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drm/i915/execlists: Wait for ELSP submission on restart

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After a reset, we will ensure that there is at least one request
submitted to HW to ensure that a context is loaded for powersaving.
Let's wait for this submission via a tasklet to complete before we drop
our forcewake, ensuring the system is ready for rc6 before we let it
possibly sleep.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20180522101937.7738-1-chris@chris-wilson.co.uk
Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
This commit is contained in:
Chris Wilson 2018-05-22 11:19:37 +01:00
parent 9a4dc80399
commit fe25f30483
2 changed files with 16 additions and 1 deletions
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6
drivers/gpu/drm/i915/i915_gem.h
View file

@ -82,4 +82,10 @@ static inline void __tasklet_disable_sync_once(struct tasklet_struct *t)
tasklet_unlock_wait(t);
}
static inline void __tasklet_enable_sync_once(struct tasklet_struct *t)
{
if (atomic_dec_return(&t->count) == 0)
tasklet_kill(t);
}
#endif /* __I915_GEM_H__ */

11
drivers/gpu/drm/i915/intel_lrc.c
View file

@ -2008,7 +2008,16 @@ static void execlists_reset(struct intel_engine_cs *engine,
static void execlists_reset_finish(struct intel_engine_cs *engine)
{
tasklet_enable(&engine->execlists.tasklet);
/*
* Flush the tasklet while we still have the forcewake to be sure
* that it is not allowed to sleep before we restart and reload a
* context.
*
* As before (with execlists_reset_prepare) we rely on the caller
* serialising multiple attempts to reset so that we know that we
* are the only one manipulating tasklet state.
*/
__tasklet_enable_sync_once(&engine->execlists.tasklet);
GEM_TRACE("%s\n", engine->name);
}