Commit graph

7 commits

Author SHA1 Message Date
Lothar Waßmann
8f5260c8c1 ARM: i.MX IOMUX-V3 replace struct pad_desc with bitmapped cookie
The following patch is a first step to convert the 'struct pad_desc'
to a bitmapped cookie to facilitate adding platform specific pullup or
drive strength definitions to existing pad definitions without need to
rewrite the complete pad def.

The patch wraps 'struct pad_desc' in an opaque data type and
introduces macros to access the individual members.
This patch does not constitute any functional change!

Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2010-11-24 09:56:58 +01:00
Jason Wang
426ab49b33 mxc/iomux: add GPIO bank offset for iomux v3 platforms
These GPIO bank offsets are useful when define a gpio number.
E.G. when GPIO PORTC pin 6 is used for irq request pin of external
expanding device, we can define it like:
  #define EXP_PARENT_IRQ_PIN (GPIO_PORTC + 6)

Signed-off-by: Jason Wang <jason77.wang@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2010-07-26 14:18:24 +02:00
Amit Kucheria
a329b48c43 mxc: Core support for Freescale i.MX5 series
Add basic clock support, cpu identification, I/O mapping, interrupt
controller, serial port and ethernet.

Signed-off-by: Amit Kucheria <amit.kucheria@canonical.com>
2010-02-09 18:32:16 +02:00
Sascha Hauer
654166d687 mxc: iomux v3: remove resource handling
The current model does not allow to put a pad into different modes
once a pins is allocated. Remove the resource handling.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2009-11-24 08:39:43 +01:00
Sascha Hauer
6134b2cbb0 iomux-v3: Allow for a runtime base address
also, check for a valid pad_ctrl_ofs before changing the
pad control register.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2009-08-14 12:40:41 +02:00
Sascha Hauer
997d74b18a MXC iomux-v3: Fix defines for PAD_CTL registers
The old defines leaked in from an old version of the patch.
Change the defines to match the register layout of the iomuxer.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2009-08-07 12:10:54 +02:00
Sascha Hauer
bca6ef1e53 MXC: Add iomux support for MX35 SoCs
This iomux is called iomux-v3 in the tree because it is the third known
incarnation of MXC iomuxers. It is not only found on the MX35 but also
on the MX51 and probably others.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2009-05-07 16:14:56 +02:00