* pm-cpufreq: (21 commits)
intel_pstate: skip this driver if Sun server has _PPC method
cpufreq: arm_big_little: free OPP table created during ->init()
imx6q: free OPP table created during ->init()
exynos5440: free OPP table created during ->init()
cpufreq-dt: free OPP table created during ->init()
cpufreq-dt: register cooling device from ->ready() callback
cpufreq: Introduce ->ready() callback for cpufreq drivers
cpufreq-dt: pass 'policy->related_cpus' to of_cpufreq_cooling_register()
cpufreq: Fix formatting issues in 'struct cpufreq_driver'
cpufreq: pxa2xx: Add Kconfig entry
cpufreq: Ref the policy object sooner
cpufreq: Kconfig: Remove architecture specific menu entries
cpufreq: pcc: Enable autoload of pcc-cpufreq for ACPI processors
intel_pstate: Add CPUID for BDW-H CPU
intel_pstate: Add support for HWP
x86: Add support for Intel HWP feature detection.
cpufreq: respect the min/max settings from user space
cpufreq: cpufreq-dt: Handle regulator_get_voltage() failure
cpufreq: cpufreq-dt: Improve debug about matching OPP
cpufreq: Loongson1: Add cpufreq driver for Loongson1B
...
* pm-cpuidle:
cpuidle: add MAINTAINERS entry for ARM Exynos cpuidle driver
drivers: cpuidle: Remove cpuidle-arm64 duplicate error messages
drivers: cpuidle: Add idle-state-name description to ARM idle states
drivers: cpuidle: Add status property to ARM idle states
cpuidle: Invert CPUIDLE_FLAG_TIME_VALID logic
* device-properties:
leds: leds-gpio: Fix multiple instances registration without 'label' property
leds: leds-gpio: Fix legacy GPIO number case
ACPI / property: Drop size_prop from acpi_dev_get_property_reference()
leds: leds-gpio: Convert gpio_blink_set() to use GPIO descriptors
ACPI / GPIO: Document ACPI GPIO mappings API
net: rfkill: gpio: Add default GPIO driver mappings for ACPI
ACPI / GPIO: Driver GPIO mappings for ACPI GPIOs
input: gpio_keys_polled: Make use of device property API
leds: leds-gpio: Make use of device property API
gpio: Support for unified device properties interface
Driver core: Unified interface for firmware node properties
input: gpio_keys_polled: Add support for GPIO descriptors
leds: leds-gpio: Add support for GPIO descriptors
gpio: sch: Consolidate core and resume banks
gpio / ACPI: Add support for _DSD device properties
misc: at25: Make use of device property API
ACPI: Allow drivers to match using Device Tree compatible property
Driver core: Unified device properties interface for platform firmware
ACPI: Add support for device specific properties
Conflicts:
drivers/scsi/scsi_debug.c
Agreed and tested resolution to a merge problem between a fix in scsi_debug
and a driver update
Signed-off-by: James Bottomley <JBottomley@Parallels.com>
TMP435 supports a range of I2C addresses, not just 0x4c.
Cc: Patrick Titiano <ptitiano@baylibre.com>
Cc: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Reviewed-by: Jean Delvare <jdelvare@suse.de>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Lots and lots of changes this time around, the usual set of driver
updates and a huge bulk of cleanups from Lars-Peter. Probably the most
interesting thing for most users is the Intel driver updates which will
(with some more machine integration work) enable support for newer x86
laptops.
- Conversion of AC'97 drivers to use regmap, bringing us closer to the
removal of the ASoC level I/O code.
- Clean up a lot of old drivers that were open coding things that have
subsequently been implemented in the core.
- Some DAPM performance improvements.
- Removal of the now seldom used CODEC mutex.
- Lots of updates for the newer Intel SoC support, including support
for the DSP and some Cherrytrail and Braswell machine drivers.
- Support for Samsung boards using rt5631 as the CODEC.
- Removal of the obsolete AFEB9260 machine driver.
- Driver support for the TI TS3A227E headset driver used in some
Chrombeooks.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJUhajpAAoJECTWi3JdVIfQcOsH/00TMeXlkIjnYe+AC9VjEMYN
IAYaXs1UcAfxB4CpS9ik4sb4LQnnxl9aqy5clUZOLHvDAgHmi6L1E8CteJUGFXZ6
/jjpu9/mI975asgyiNP44QDLSNDjzXX6Z1eeXRGvyKMNZkpg4FLfVq9a6ONtf1dw
N3Hl3LG+wvPhAdR/OSKg9eDVnV1iY7mWOWr/9/1q8UhYRpCTL8x70ytBz6tfeU2r
4fQmFma+qefYXvyuqzuiwzSHJKt+46Z35EyNlkCBpVJVErZL2TGOv4H04PjZhg6+
4CR+YGJMSURRhgMCvUCAh4j6a4c+oSXU/LEl9wMcjWMfa3UtZWKojqlK8lYMeoE=
=Pv8r
-----END PGP SIGNATURE-----
Merge tag 'asoc-v3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound into for-linus
ASoC: Updates for v3.19
Lots and lots of changes this time around, the usual set of driver
updates and a huge bulk of cleanups from Lars-Peter. Probably the most
interesting thing for most users is the Intel driver updates which will
(with some more machine integration work) enable support for newer x86
laptops.
- Conversion of AC'97 drivers to use regmap, bringing us closer to the
removal of the ASoC level I/O code.
- Clean up a lot of old drivers that were open coding things that have
subsequently been implemented in the core.
- Some DAPM performance improvements.
- Removal of the now seldom used CODEC mutex.
- Lots of updates for the newer Intel SoC support, including support
for the DSP and some Cherrytrail and Braswell machine drivers.
- Support for Samsung boards using rt5631 as the CODEC.
- Removal of the obsolete AFEB9260 machine driver.
- Driver support for the TI TS3A227E headset driver used in some
Chrombeooks.
Local/global locks are currently not documented anywhere other
than in an somewhat out-of-date LWN article - this is an attempt
to document the current state of lglocks.
This patch is against linux-next 3.18.0-rc6
Signed-off-by: Nicholas Mc Guire <der.herr@hofr.at>
Cc: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
Cc: Carsten Emde <c.emde@osadl.org>
Cc: Steven Rostedt <rostedt@goodmis.org>
Cc: Jonathan Corbet <corbet@lwn.net>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Link: http://lkml.kernel.org/r/20141208083326.GA29895@opentech.at
Signed-off-by: Ingo Molnar <mingo@kernel.org>
These are a pre-req to get rk3288 SMP to work with some firmwares, so merge
it in here as well as in next/drivers.
* clocksource/physical-timers:
clocksource: arch_timer: Allow the device tree to specify uninitialized timer registers
clocksource: arch_timer: Fix code to use physical timers when requested
* clocksource/physical-timers:
clocksource: arch_timer: Allow the device tree to specify uninitialized timer registers
clocksource: arch_timer: Fix code to use physical timers when requested
Some 32-bit (ARMv7) systems are architected like this:
* The firmware doesn't know and doesn't care about hypervisor mode and
we don't want to add the complexity of hypervisor there.
* The firmware isn't involved in SMP bringup or resume.
* The ARCH timer come up with an uninitialized offset (CNTVOFF)
between the virtual and physical counters. Each core gets a
different random offset.
* The device boots in "Secure SVC" mode.
* Nothing has touched the reset value of CNTHCTL.PL1PCEN or
CNTHCTL.PL1PCTEN (both default to 1 at reset)
On systems like the above, it doesn't make sense to use the virtual
counter. There's nobody managing the offset and each time a core goes
down and comes back up it will get reinitialized to some other random
value.
This adds an optional property which can inform the kernel of this
situation, and firmware is free to remove the property if it is going
to initialize the CNTVOFF registers when each CPU comes out of reset.
Currently, the best course of action in this case is to use the
physical timer, which is why it is important that CNTHCTL hasn't been
changed from its reset value and it's a reasonable assumption given
that the firmware has never entered HYP mode.
Note that it's been said that on ARMv8 systems the firmware and
kernel really can't be architected as described above. That means
using the physical timer like this really only makes sense for ARMv7
systems.
Signed-off-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Sonny Rao <sonnyrao@chromium.org>
Reviewed-by: Mark Rutland <mark.rutland@arm.com>
Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
This adds the driver pieces required for IOMMU support on Tegra30,
Tegra114 and Tegra124.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iQIcBAABAgAGBQJUgHtUAAoJEN0jrNd/PrOhO4kQAKPK7g3zPOCzKNwMvtrMKL2M
a0U3OQEV5GcJaM55EObi5FyGci/IKAOABPfkexuRiPQGOYOM6n854a5QCwitT4XX
sHMWy+kbFi2lYNrsMMadw6Ho3ZalpVXLpg4bBEeUJMGo72BNi7zZ/hj+l15wnK3x
/o5l1y4acD+9Jf7ka2omsXJYp85lBjfQDVn0wt3/eNCJo4FKihybkVcYAyG0yM7u
Hb3MRjcSO2E0HCBCrms7A9sCCPHUokAHIfnEKu4KXHIyO6d89q9wBe+O01dGA33f
TnFOJvfE0s3pr/uWTzVkx4zgQDfqauAKu6+c37Hv+xLMNgn+v+XtZupTqSOnRzN/
MUPhZErIz3XqpmJVUbAH4H600c/wYckedlYYiyMqmZ2Xf/QkBhOwlym1jKoNuicT
+R4I5MTIPO1lDAefLOQAqJYauAH2525bt8Pqvywh6CIuNrLJxcD8gIESOyMQsm6K
22tUG+qh5GX2zKCY+QFCJQ5w2IjVVcO83r+iaXCQAIfuIx/cGzfLhosjKnnv7kmw
D6qVQ57gFxHe9fUgj/oMPJnq5bfJorrI+0lS6i7Eq1nhV9bGU0JdGEM08CGxL4jZ
BxyX/NK3JXg1oKMswMN5TMZ3iewRgJ08O7jYGtdriD/J5aLarjkdyMfq+DvM2Qxa
0dWArfjSXd/2jcdCKpgb
=R4je
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-3.19-iommu' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/drivers
Pull "ARM: tegra: IOMMU support for v3.19" from Thierry Reding:
This adds the driver pieces required for IOMMU support on Tegra30,
Tegra114 and Tegra124.
* tag 'tegra-for-3.19-iommu' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
memory: Add NVIDIA Tegra memory controller support
of: Add NVIDIA Tegra memory controller binding
ARM: tegra: Move AHB Kconfig to drivers/amba
amba: Add Kconfig file
clk: tegra: Implement memory-controller clock
powerpc/iommu: Rename iommu_[un]map_sg functions
iommu: Improve error handling when setting bus iommu
iommu: Do more input validation in iommu_map_sg()
iommu: Add iommu_map_sg() function
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJUctX9AAoJEFDCiBxwnmDrYzQQANVqyYFY/VRMvS5pPuPuA51L
K5NQRZ7AFpZCCyfYffiC8DfFHB4WibfXUUwT8ElJVFgRnzs7u3OmMX7rKbFR0QfY
rtt1nhrG77SP+/rriE9uc+mHOBO0+pauEsRROqOJleqEWwO4jXUz/g6x/34IRcuC
CFrLqz/bhmn7w9eTz27UnVwJSJMNvAVpnBIScSMClZFWtmNIF8pMgqjDqOc8XF2U
2k7vMU0Af2BGkyKdrvqKcSOUoF16iC18rbuj6EBOHR87Ymd2s4gqZ5jcDv3kww7K
/TVV9gIeS5zFXpK8obSMkvVsRhfZmJzbdRyj2tZQD8vh1KRA+Efiq5Jsq9m+iztN
kyCpwnt3FX7KHgXlj/8m2aDOTd4HjT4x4661CMTHSbYDvRVxWkJS7eLcCKwt/F9Z
o6lYw0AOiCC8tP21wK5xjxuYlbmnWKQIkIHE8JPZkRSw9bcGB4UgMsy0/4iHbUoW
T9YtvAE2qSJOrER1xHRnl1dfFMhIHVX4XaOCbb3EnOSlSxQMmyzJJZUHwSUwdr1I
IXxW+3Wc41Rqklv8PQbI0Gv6/hR+Tb8BMB8r0dq4qeCfdobFTEvtGuLa0KSeFXgy
439aM2zSUIXAYOOEyG7GsUkgaMj1enQsj/azB6aJl5C6yWBdFcF5ZcTM0uTbwuKt
Xcs/9Nu7BNTDo3UcPhBx
=FuM7
-----END PGP SIGNATURE-----
Merge tag 'reset-for-3.19-2' of git://git.pengutronix.de/git/pza/linux into next/drivers
Pull "Reset controller changes for v3.19" from Philipp Zabel:
This adds a new driver for the sti soc family, and creates
a reset_control_status interface, which is added to the existing
drivers.
* tag 'reset-for-3.19-2' of git://git.pengutronix.de/git/pza/linux:
reset: add socfpga_reset_status
reset: sti: Document sti-picophyreset controllers bindings.
reset: stih407: Add softreset, powerdown and picophy controllers
reset: stih407: Add reset controllers DT bindings
reset: add reset_control_status helper function
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Armada 370/XP suspend/resume support
- mvebu SoC driver suspend/resume support
- irqchip
- clocksource
- mbus
- clk
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iQIcBAABAgAGBQJUe0lIAAoJEP45WPkGe8Zn/IgP/jOO8c7t7dohRbAe3axzIcaC
DLL7d7j0AScZGXLx1/xJrFFY/P3gn3dlLR7HnT0t4K7vcW0kP4orMGo6FcGicSOZ
VzQf88cOkunKf9NTM1Y0LOXVWTHGuACiXAnxook5A6k+l0xQ1t+uewgEKrg/33VK
6WQ6woe2eYFwghkFwL3ybjttOPM5nxPef6v3TZ3LfwSUBsnSm70F1XiO8xZJH+LM
fL83P409LGWgohwSaXYRdPJcNM0U7QMNo6i/If9NNBhIkdKb6llhQ/DvI+aXUvqB
aD9/4t+Q75yki0mXIin6irltjspWsR8OFbaKZOM5IBFp/XrsKvNU+wy++7z9se9z
qfG1QYmKk3ddI0isoksuIJpfbrlbQqFKCGlNkn8HVi4xCYCijNgb5bUrHQ27Aa4U
GGisAOhqs9Ktpz96WeNKjvNQBSJZ3ESd6tlLrwCei8DwEdT0Z73jr1aEnulurpPG
A3kiUhVpRIU+w0cth5Kix2bZj7JGsykzu1x5xORLE+MN8RSgmoveGyY5CBp2MHrl
NxR/u98SD9I/rWT3DwQIKxM5ZqF4AAnyj4SaSWR/f40kWMU+A+eMEfo8VUeO88fl
ygeeHTghSf58gbdgganRfDyY8OaQHeYNNKbWK6c7vxyMX98vwHOtOb5JS3nn0p7q
Fugy/6qf+ZqYHT4nczJO
=uX+e
-----END PGP SIGNATURE-----
Merge tag 'mvebu-soc-suspend-3.19' of git://git.infradead.org/linux-mvebu into next/soc
Pull "mvebu SoC suspend changes for v3.19" from Jason Cooper:
- Armada 370/XP suspend/resume support
- mvebu SoC driver suspend/resume support
- irqchip
- clocksource
- mbus
- clk
* tag 'mvebu-soc-suspend-3.19' of git://git.infradead.org/linux-mvebu:
ARM: mvebu: add SDRAM controller description for Armada XP
ARM: mvebu: adjust mbus controller description on Armada 370/XP
ARM: mvebu: add suspend/resume DT information for Armada XP GP
ARM: mvebu: synchronize secondary CPU clocks on resume
ARM: mvebu: make sure MMU is disabled in armada_370_xp_cpu_resume
ARM: mvebu: Armada XP GP specific suspend/resume code
ARM: mvebu: reserve the first 10 KB of each memory bank for suspend/resume
ARM: mvebu: implement suspend/resume support for Armada XP
clk: mvebu: add suspend/resume for gatable clocks
bus: mvebu-mbus: provide a mechanism to save SDRAM window configuration
bus: mvebu-mbus: suspend/resume support
clocksource: time-armada-370-xp: add suspend/resume support
irqchip: armada-370-xp: Add suspend/resume support
Documentation: dt-bindings: minimal documentation for MVEBU SDRAM controller
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This pull request contains the following changes to the Broadcom GISB bus
arbiter from Kevin Cernekee:
- Extend brcmstb GISB bus driver to work on MIPS (currently ARM-only) and support
65nm and 40nm MIPS-based chips such as: BCM7038, BCM7400 and BCM7435
* tag 'arm-soc/for-3.19/brcmstb-drivers' of https://github.com/brcm/linux:
bus: brcmstb_gisb: Add register offset tables for older chips
bus: brcmstb_gisb: Look up register offsets in a table
bus: brcmstb_gisb: Introduce wrapper functions for MMIO accesses
bus: brcmstb_gisb: Make the driver buildable on MIPS
Conflicts:
drivers/bus/brcmstb_gisb.c
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Add input and output capability flags for setting native size of the device,
and document them.
Signed-off-by: Sakari Ailus <sakari.ailus@iki.fi>
Acked-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
The V4L2_SEL_TGT_NATIVE_SIZE target is used to denote e.g. the size of a
sensor's pixel array.
Signed-off-by: Sakari Ailus <sakari.ailus@iki.fi>
Acked-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
The sub-device format documentation documented scaling configuration through
formats. Instead the compose selection rectangle is elsewhere documented to
be used for the purpose. Remove scaling related part of the documentation.
Signed-off-by: Sakari Ailus <sakari.ailus@iki.fi>
Acked-by: Hans Verkuil <hans.verkuil@cisco.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
After commit b2b49ccbdd (PM: Kconfig: Set PM_RUNTIME if PM_SLEEP is
selected) PM_RUNTIME is always set if PM is set, so quite a few
depend on CONFIG_PM (or even dropped in some cases).
Replace CONFIG_PM_RUNTIME with CONFIG_PM in the USB core code
and documentation.
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Acked-by: Alan Stern <stern@rowland.harvard.edu>
Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Add a global binding for the chosen node. Include a description of the
stdout-path, and an explicit statement on its extra options in the
context of a UART console.
Opening description stolen from www.devicetree.org, and part of the
remaining text provided by Mark Rutland.
Signed-off-by: Leif Lindholm <leif.lindholm@linaro.org>
[grant.likely: remove reference to uart_parse_options]
Reviewed-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Grant Likely <grant.likely@linaro.org>
Currently, function graph tracer prints "!" or "+" just before
function execution time to signal a function overhead, depending
on the time. And some tracers tracing latency also print "!" or
"+" just after time to signal overhead, depending on the interval
between events. Even it is usually enough to do that, we sometimes
need to signal for bigger execution time than 100 micro seconds.
For example, I used function graph tracer to detect if there is
any case that exit_mm() takes too much time. I did following steps
in /sys/kernel/debug/tracing. It was easier to detect very large
excution time with patched kernel than with original kernel.
$ echo exit_mm > set_graph_function
$ echo function_graph > current_tracer
$ echo > trace
$ cat trace_pipe > $LOGFILE
... (do something and terminate logging)
$ grep "\\$" $LOGFILE
3) $ 22082032 us | } /* kernel_map_pages */
3) $ 22082040 us | } /* free_pages_prepare */
3) $ 22082113 us | } /* free_hot_cold_page */
3) $ 22083455 us | } /* free_hot_cold_page_list */
3) $ 22083895 us | } /* release_pages */
3) $ 22177873 us | } /* free_pages_and_swap_cache */
3) $ 22178929 us | } /* unmap_single_vma */
3) $ 22198885 us | } /* unmap_vmas */
3) $ 22206949 us | } /* exit_mmap */
3) $ 22207659 us | } /* mmput */
3) $ 22207793 us | } /* exit_mm */
And then, it was easy to find out that a schedule-out occured by
sub_preempt_count() within kernel_map_pages().
To detect very large function exection time caused by either problematic
function implementation or scheduling issues, this patch can be useful.
Link: http://lkml.kernel.org/r/1416789259-24038-1-git-send-email-byungchul.park@lge.com
Signed-off-by: Byungchul Park <byungchul.park@lge.com>
Signed-off-by: Steven Rostedt <rostedt@goodmis.org>
I'm stuck into panic that too litte free memory is left when I boot with
trace_buf_size parameter. After digging into the problem, I found that
trace_buf_size is the size of trace buffer on each cpu rather than total
size of trace buffer. To prevent victim like me, change description of
trace_buf_size parameter more accurately.
Link: http://lkml.kernel.org/r/1417570760-10620-1-git-send-email-iamjoonsoo.kim@lge.com
Signed-off-by: Joonsoo Kim <iamjoonsoo.kim@lge.com>
Signed-off-by: Steven Rostedt <rostedt@goodmis.org>
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJUe7l9AAoJEHm+PkMAQRiGkGcIAIryQ7NKn4IaxUtS807Lx4Ih
obEnx7nNKZTXCZpD/7XQGHMMJyozMJR50PHZESJoHu4Luhv9h7EFRnyJ6MdqMlwn
zla3zY0yRsHwPoJKcHbSE0CPHZz0WPQHj7IEbM+XJz2tMNJfbgTrezElmcCM4DRp
c9ae+ggwZ2cyNYM0r2RSwSJ525WMh69f9dzSUE27fpvkllQgwqNs/jHYz8HNOEht
FWcv5UhvzKjwJS3awULfOB3zH2QdFvVTrwAzd+kbV2Q6T6CaUoFRlhXeKUO6W2Jv
pJM6oj8tMZUkdXEv7EQXT1kwEqC4DULTTTHs4tSF79O1ESmNfePiOwwBcwoM2nM=
=kG1Y
-----END PGP SIGNATURE-----
Merge tag 'v3.18-rc7' into for-next
... for allowing more cleanups of hda_intel.c driver-caps where both
upstream and for-next contain the changes.
Signed-off-by: Jiri Pirko <jiri@resnulli.us>
Reviewed-by: Thomas Graf <tgraf@suug.ch>
Acked-by: John Fastabend <john.r.fastabend@intel.com>
Acked-by: Andy Gospodarek <gospo@cumulusnetworks.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
The goal of this is to provide a possibility to support various switch
chips. Drivers should implement relevant ndos to do so. Now there is
only one ndo defined:
- for getting physical switch id is in place.
Note that user can use random port netdevice to access the switch.
Signed-off-by: Jiri Pirko <jiri@resnulli.us>
Reviewed-by: Thomas Graf <tgraf@suug.ch>
Acked-by: Andy Gospodarek <gospo@cumulusnetworks.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
LM95233 is similar to LM95234, but it only supports two
instead of four external temperature sensors.
Reviewed-by: Jean Delvare <jdelvare@suse.de>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
LM95235 is register compatible to LM95245.
Also update link to LM95245 data sheet, and drop the link to the
datasheet from the driver source to simplify code maintenance.
Reviewed-by: Jean Delvare <jdelvare@suse.de>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Romain Perier <romain.perier@gmail.com>
Acked-by: Johan Hovold <johan@kernel.org>
Acked-by: Grant Likely <grant.likely@linaro.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
It reverts commit a4b4e0461e ("of: Add standard property for poweroff capability").
As discussed on the mailing list, it makes more sense to rename back to the
old established property name, without the vendor prefix. Problem being that
the word "source" usually tends to be used for inputs and that is out of control
of the OS. The poweroff capability is an output which simply turns the
system-power off. Also, this property might be used by drivers which power-off
the system and power back on subsequent RTC alarms. This seems to suggest to
remove "poweroff" from the property name and to choose "system-power-controller"
as the more generic name. This patchs adds the required renaming changes and
defines an helper function which checks if this property is set.
Signed-off-by: Romain Perier <romain.perier@gmail.com>
Acked-by: Grant Likely <grant.likely@linaro.org>
Acked-by: Johan Hovold <johan@kernel.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
The colorspace chapter in the V4L2 Specification was always poorly
written. This patch rewrites it, documenting the new Y'CbCr encoding
and quantization defines and going into much more detail with respect
to how colorspaces are used and what it all means.
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
Digilent is a board designer, making various Linux capabable FPGA and
processor boards. Add to the vendor list.
Acked-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
The specification requires xlnx,data-width, but example and driver use
xlnx,datawidth. Change the specification to match the implementation.
Reviewed-by: Michal Simek <michal.simek@xilinx.com>
Fixes: eebeac03db ("dma: Add Xilinx Video DMA DT Binding Documentation")
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
NCT6792D is similar to NCT6791D. Only beep control and temperature
monitoring registers are different.
Reviewed-by: Jean Delvare <jdelvare@suse.de>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Document support for NCT6102D/NCT6104D/NCT6106D and NCT6791D.
Document that NCT5573D is compatible to NCT6775F with the same chip ID.
Reviewed-by: Jean Delvare <jdelvare@suse.de>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
It is basically a faster lm75 with improved (11 bit) resolution.
Signed-off-by: Michael Thalmeier <michael.thalmeier@hale.at>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Add device tree bindings documentation for ltc2978.
Signed-off-by: Alan Tull <atull@opensource.altera.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Mark Brown <broonie@kernel.org>
[Guenter Roeck: Minor correction of 'compatible' example]
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
This commit extends the mvebu-mbus driver to provide suspend/resume
support. Since mvebu-mbus is not a platform_driver, the syscore_ops
mechanism is used to get ->suspend() and ->resume() hooks called into
the driver.
In those hooks, we save and restore the MBus windows state, to make
sure after resume all Mbus windows are properly restored. Note that
while the state of some windows could be gathered by looking again at
the Device Tree (for statically described windows), it is not the case
of dynamically described windows such as the PCIe memory and I/O
windows. Therefore, we take the simple approach of saving and
restoring the registers for all MBus windows.
In addition, the commit extends the Device Tree binding of the MBus
controller, to control the MBus bridge registers (which define which
parts of the physical address space is routed to MBus windows
vs. normal RAM memory). Those registers must be saved and restored
during suspend/resume. The Device Tree binding extension is made is a
backward compatible fashion, but of course, suspend/resume will not
work without the Device Tree update.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Link: https://lkml.kernel.org/r/1416585613-2113-7-git-send-email-thomas.petazzoni@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
This will select the appropriate register layout based on the DT
"compatible" string.
Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
- Device additions for board vf610-colibri, pwm, backlight, I2C, RTC,
ADC etc.
- Update i.MX6 phyFLEX board to include PCIe, CAN and audio support
- Improve SSI clocks description for i.MX5 platforms
- Add ENET2 support for imx6sx-sdb board
- Add device tree source for LS1021A SoC, board QDS and TWR
- Enable cpufreq support for i.MX53
- Enable VPU device support for i.MX6QDL
- Enable poweroff support for i.MX6 SoCs
- Add support for TBS2910 Matrix ARM mini PC which is built on i.MX6Q
- Create generic base device trees for Vybrid and add support for
Colibri VF50
Note: the change set is built on top of imx-soc-3.19 to resolve the
dependency that "ARM: dts: imx53: add cpufreq-dt support" uses the
clock define IMX5_CLK_ARM that is added by "ARM: imx53: clk: add ARM
clock".
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJUcZicAAoJEFBXWFqHsHzO0ooH/ie5r7JDjklD6IlAxD9UyDyp
RQSF/8VYTc1EhECI5D/xmHARnUM5AxfMBQzFyavz/0hkGp22xJtBgp5ZlYtWwyAF
qpLI031/5hn+37NyMxdcd6nU55e7GJw4loBXTZ5pNSRdP+ubsUVccfUdQ1K5hPA6
KeS5vqaX26c5P2R+tkx2pfRLmCrSWNKNIpIbZzenlu2dS7U77ex1AO2W+ToDTgQ3
asVIMD/7oQ4soEGZfSQdzHCftQ2OdVGlybFoMCkW5xrzRVfucbSN2BbLpEM5Z117
/DZpfAmHlT4NrGz/BBzpK6l3AWFmXLmCP/dFvvfzKM3uWgr/zlVF8ChW/xgCc+g=
=FnNq
-----END PGP SIGNATURE-----
Merge tag 'imx-dt-3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/dt
Pull "The i.MX device tree changes for 3.19" from Shawn Guo:
- Device additions for board vf610-colibri, pwm, backlight, I2C, RTC,
ADC etc.
- Update i.MX6 phyFLEX board to include PCIe, CAN and audio support
- Improve SSI clocks description for i.MX5 platforms
- Add ENET2 support for imx6sx-sdb board
- Add device tree source for LS1021A SoC, board QDS and TWR
- Enable cpufreq support for i.MX53
- Enable VPU device support for i.MX6QDL
- Enable poweroff support for i.MX6 SoCs
- Add support for TBS2910 Matrix ARM mini PC which is built on i.MX6Q
- Create generic base device trees for Vybrid and add support for
Colibri VF50
Note: the change set is built on top of imx-soc-3.19 to resolve the
dependency that "ARM: dts: imx53: add cpufreq-dt support" uses the
clock define IMX5_CLK_ARM that is added by "ARM: imx53: clk: add ARM
clock".
* tag 'imx-dt-3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (51 commits)
ARM: dts: imx6q-tbs2910: Enable snvs-poweroff
ARM: dts: imx6: add pm_power_off support for i.mx6 chips
ARM: dts: vf-colibri: add USB regulators
ARM: dts: imx6: phyFLEX: Add CAN support
ARM: dts: imx6: phyFLEX: Add PCIe
ARM: dts: imx6: phyFLEX: Set correct interrupt for pmic
ARM: dts: imx6: phyFLEX: Enable gpmi in module file
ARM: dts: imx6: phyFLEX: set nodes in alphabetical order
ARM: dts: vf-colibri-eval-v3.dts: Enable ST-M41T0M6 RTC
ARM: dts: vf-colibri: Add I2C support
ARM: dts: imx6qdl: Enable CODA960 VPU
ARM: dts: imx6q-tbs2910: Remove unneeded 'fsl,mode' property
ARM: dts: vf610: enable USB misc/phy nodes where necessary
ARM: dts: vf610: use new GPIO support
ARM: dts: pbab01: enable I2S audio on phyFLEX-i.MX6 boards
ARM: dts: pbab01: move i2c pins and frequency configuration into pfla02
ARM: dts: vf500-colibri: add Colibri VF50 support
ARM: dts: vf610: create generic base device trees
ARM: dts: vf610: assign oscillator to clock module
dt-bindings: arm: add Freescale LS1021A SoC device tree binding
...
Signed-off-by; Arnd Bergmann <arnd@arndb.de>
- Update i.MX6 suspend code to check DDR instead of CPU type, as the
difference we need to handle is between LPDDR2 and DDR3, not SoCs.
- Set anatop properly for LPDDR2 in DSM mode
- Add support for new SoC LS1021A which integrates dual Cortex-A7
- Add ENET initialization for i.MX6SX platform
- Add cpufreq support for i.MX53 platform
- Add a SNVS based poweroff driver for i.MX6 platforms
- Use ARM Global Timer as clocksource on VF610
Note: the change set is built on top of tag imx-fixes-3.18-2 to resolve
a conflict on file arch/arm/mach-imx/clk-vf610.c.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJUcYdSAAoJEFBXWFqHsHzObr4H/RpZ9BlKLonp/HEcdsbCj+Yt
FvEcLS2V1UaHK1o8Gk93pdXHentxWlXYOunSE068xIetgrZi5wVimvV2q14WQZh6
KlRTYgMiPvQmewoaL0QnLaYECqhAoD89PGTQbgLatn8tihzCKKbbnNR6KA+n8qQm
0xpAcm3xckHdvCvr7t4C/lDgkww0Xd4XxMnmuSR9QxdW9doESZfk0emfm7sYd1gx
GW+WAnD0vcMkaPwsCSklI9aaaDE+yELhyu/acocrKIjPPEco6mBFE8Afiwija+pO
NWDegpEqru4IT9/rpTTc5eygKHfVVhSCS1cd+P9e8Ea3d9q3Q/AV/95WiBVJiGg=
=AZMX
-----END PGP SIGNATURE-----
Merge tag 'imx-soc-3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/soc
Pull "The i.MX SoC update for 3.19" from Shawn Guo
- Update i.MX6 suspend code to check DDR instead of CPU type, as the
difference we need to handle is between LPDDR2 and DDR3, not SoCs.
- Set anatop properly for LPDDR2 in DSM mode
- Add support for new SoC LS1021A which integrates dual Cortex-A7
- Add ENET initialization for i.MX6SX platform
- Add cpufreq support for i.MX53 platform
- Add a SNVS based poweroff driver for i.MX6 platforms
- Use ARM Global Timer as clocksource on VF610
Note: the change set is built on top of tag imx-fixes-3.18-2 to resolve
a conflict on file arch/arm/mach-imx/clk-vf610.c.
* tag 'imx-soc-3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
power: reset: imx-snvs-poweroff: add power off driver for i.mx6
ARM: imx: temporarily remove CONFIG_SOC_FSL from LS1021A
ARM: imx: clk-vf610: get input clocks from assigned clocks
ARM: imx: Add Freescale LS1021A SMP support
ARM: imx: Add initial support for Freescale LS1021A
ARM: imx53: add cpufreq support
ARM: imx53: clk: add ARM clock
ARM: imx: add CPU clock type
ARM: imx5: add step clock, used when reprogramming PLL1
ARM: imx: add enet init for i.mx6sx
ARM: imx6sx: add imx6sx iomux-gpr field define
ARM: vf610: Add ARM Global Timer clocksource option
ARM: imx: add anatop settings for LPDDR2 when enter DSM mode
ARM: imx: replace cpu type check with ddr type check
ARM: imx: Fix the removal of CONFIG_SPI option
ARM: imx: clk-vf610: define PLL's clock tree
Signed-off-by; Arnd Bergmann <arnd@arndb.de>
Pull networking fixes from David Miller:
"Several small fixes here:
1) Don't crash in tg3 driver when the number of tx queues has been
configured to be different from the number of rx queues. From
Thadeu Lima de Souza Cascardo.
2) VLAN filter not disabled properly in promisc mode in ixgbe driver,
from Vlad Yasevich.
3) Fix OOPS on dellink op in VTI tunnel driver, from Xin Long.
4) IPV6 GRE driver WCCP code checks skb->protocol for ETH_P_IP
instead of ETH_P_IPV6, whoops. From Yuri Chislov.
5) Socket matching in ping driver is buggy when packet AF does not
match socket's AF. Fix from Jane Zhou.
6) Fix checksum calculation errors in VXLAN due to where the
udp_tunnel6_xmit_skb() helper gets it's saddr/daddr from. From
Alexander Duyck.
7) Fix 5G detection problem in rtlwifi driver, from Larry Finger.
8) Fix NULL deref in tcp_v{4,6}_send_reset, from Eric Dumazet.
9) Various missing netlink attribute verifications in bridging code,
from Thomas Graf.
10) tcp_recvmsg() unconditionally calls ipv4 ip_recv_error even for
ipv6 sockets, whoops. Fix from Willem de Bruijn"
* git://git.kernel.org/pub/scm/linux/kernel/git/davem/net: (29 commits)
net-timestamp: make tcp_recvmsg call ipv6_recv_error for AF_INET6 socks
bridge: Sanitize IFLA_EXT_MASK for AF_BRIDGE:RTM_GETLINK
bridge: Add missing policy entry for IFLA_BRPORT_FAST_LEAVE
net: Check for presence of IFLA_AF_SPEC
net: Validate IFLA_BRIDGE_MODE attribute length
bridge: Validate IFLA_BRIDGE_FLAGS attribute length
stmmac: platform: fix default values of the filter bins setting
net/mlx4_core: Limit count field to 24 bits in qp_alloc_res
net: dsa: bcm_sf2: reset switch prior to initialization
net: dsa: bcm_sf2: fix unmapping registers in case of errors
tg3: fix ring init when there are more TX than RX channels
tcp: fix possible NULL dereference in tcp_vX_send_reset()
rtlwifi: Change order in device startup
rtlwifi: rtl8821ae: Fix 5G detection problem
Revert "netfilter: conntrack: fix race in __nf_conntrack_confirm against get_next_corpse"
vxlan: Fix boolean flip in VXLAN_F_UDP_ZERO_CSUM6_[TX|RX]
ip6_udp_tunnel: Fix checksum calculation
net-timestamp: Fix a documentation typo
net/ping: handle protocol mismatching scenario
af_packet: fix sparse warning
...
Make the map match the reality, the current binding text is
nonsense:
- The clock required for the clocking of the serial port
must come first and is not optional (as the driver will
otherwise proceed to grab and use the apb_pclk as uartclk),
and the apb_pclk that clocks the logic must come second
as the code will retrieve the first clock by index,
whereas the PrimeCell but will explicitly look for
"apb_pclk" so this can be specified later, as it is
looked up by name.
- The pin control state "default" is the only mandated
state, the sleep state is entirely optional.
We also add an example to avoid further confusion.
Reported-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Grant Likely <grant.likely@linaro.org>
The task_collector mode (or "latency_injector", (C) Dan Willians) is an
optional I/O path in libsas that queues up scsi commands instead of
directly sending it to the hardware. It generall increases latencies
to in the optiomal case slightly reduce mmio traffic to the hardware.
Only the obsolete aic94xx driver and the mvsas driver allowed to use
it without recompiling the kernel, and most drivers didn't support it
at all.
Remove the giant blob of code to allow better optimizations for scsi-mq
in the future.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Reviewed-by: Hannes Reinecke <hare@suse.de>
Acked-by: Dan Williams <dan.j.williams@intel.com>
Daniel Lezcano muttered:
* Marvell timer updates from Ezequiel Garcia
- Add missing clock enable calls for armada
- Change source clock for clocksource and watchdog
* SIRF timer updates from Yanchang Li
- Make clock rate configurable
The OMAP mailbox driver and its existing clients (remoteproc
for OMAP4+) are adapted to use the generic mailbox framework.
The main changes for the adaptation are:
- The tasklet used for Tx is replaced with the state machine from
the generic mailbox framework. The workqueue used for processing
the received messages stays intact for minimizing the effects on
the OMAP mailbox clients.
- The existing exported client API, omap_mbox_get, omap_mbox_put and
omap_mbox_send_msg are deleted, as the framework provides equivalent
functionality. A OMAP-specific omap_mbox_request_channel is added
though to support non-DT way of requesting mailboxes.
- The OMAP mailbox driver is integrated with the mailbox framework
through the proper implementations of mbox_chan_ops, except for
.last_tx_done and .peek_data. The OMAP mailbox driver does not need
these ops, as it is completely interrupt driven.
- The OMAP mailbox driver uses a custom of_xlate controller ops that
allows phandles for the pargs specifier instead of indexing to avoid
any channel registration order dependencies.
- The new framework does not support multiple clients operating on a
single channel, so the reference counting logic is simplified.
- The remoteproc driver (current client) is adapted to use the new API.
The notifier callbacks used within this client is replaced with the
regular callbacks from the newer framework.
- The exported OMAP mailbox API are limited to omap_mbox_save_ctx,
omap_mbox_restore_ctx, omap_mbox_enable_irq & omap_mbox_disable_irq,
with the signature modified to take in the new mbox_chan handle instead
of the OMAP specific omap_mbox handle. The first 2 will be removed when
the OMAP mailbox driver is adapted to runtime_pm. The other exported
API omap_mbox_request_channel will be removed once existing legacy
users are converted to DT.
Signed-off-by: Suman Anna <s-anna@ti.com>
Cc: Ohad Ben-Cohen <ohad@wizery.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
Some regulators from the max77802 PMIC support to be configured in one
of two operating mode: Output ON (normal) and Output On Low Power Mode.
Not all regulators support these two modes and for some of them, the
mode can be changed while the system is running in normal operation
while others only support their mode to be changed on system suspend.
Extend the max77802 PMIC binding by documenting the possible operating
modes values so the regulators modes can be configured correctly.
Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Signed-off-by: Mark Brown <broonie@kernel.org>
Exynos7 SPI controller supports only the auto Selection of
CS toggle mode and Exynos7 SoC includes six SPI controllers.
Add support for these changes in Exynos7 SPI controller driver.
Signed-off-by: Padmavathi Venna <padma.v@samsung.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Some regulators can run on different operating modes (opmodes). This
allows systems to choose the most efficient opmode for each regulator.
This patch builds on top of (291d761 regulator: Document binding for
regulator suspend state for PM state) adding a regulator-initial-mode
DT property to configure at startup the operating mode for regulators
that support changing its mode during normal operation and a property
regulator-mode to be used in the regulator-state-[mem/disk] nodes for
regulators that supports changing its operating mode when the system
enters in a suspend state.
The set of possible modes that a regulator can operate depends on the
hardware capabilities so a list of generic operating modes can't be
provided. Instead, each hardware binding should define the list of
valid operating modes for the regulators found on that device.
Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Signed-off-by: Mark Brown <broonie@kernel.org>
This patch adds syscon based phandle to i2c device nodes of exynos5250
and exynos5420. These phandles will be used to save restore i2c sysreg
configuration register during s2r from i2c driver.
CC: Rob Herring <robh+dt@kernel.org>
CC: Randy Dunlap <rdunlap@infradead.org>
CC: Russell King <linux@arm.linux.org.uk>
CC: devicetree@vger.kernel.org
CC: linux-doc@vger.kernel.org
Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch adds new board dts file to support Samsung Monk board which
is based on Exynos3250 SoC and has different H/W configuration from
Rinato.
This dts file support following features:
- eMMC
- Main PMIC (Samsung S2MPS14)
- Interface PMIC (Maxim MAX77836, MUIC, fuel-gauge, charger)
- RTC of Exynos3250
- ADC of Exynos3250 with NTC thermistor
- I2S of Exynos3250
- TMU of Exynos3250
- Secure firmware for Exynos3250 secondary cpu boot
- Serial ports of Exynos3250
- gpio-key for power key
Signed-off-by: Youngjun Cho <yj44.cho@samsung.com>
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Adding machine driver to instantiate I2S based realtek's ALC5631
sound card on Arndale board.
There are other variants of Audio Daughter Cards for Arndale
Board for which support already exists but there is no support for
Realtek's alc5631 codec hence support for ALC5631 based machine
driver is being added.
This patch also documents the device tree binding for the Arndale
board based machine driver.
Signed-off-by: Claude Youn <claude.youn@gmail.com>
Signed-off-by: Krishna Mohan Dani <krishna.md@samsung.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
This adds binding documentation for the infrared remote control
receiver available in Amlogic Meson SoCs.
Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
Add support for the DW MMC host found on the Imagination Pistachio SoC.
Like the DW MMC hosts found on SOCFPGA and Rockchip SoCs, the DW MMC
host on Pistachio requires the use of SDMMC_CMD_USE_HOLD_REG.
Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Reviewed-by: Doug Anderson <dianders@chromium.org>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
The Exynos7 has a DWMMC controller (v2.70a) which is different from
prior versions. This patch adds new compatible strings for exynos7.
This patch also fixes the CLKSEL register offset on exynos7.
Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com>
Signed-off-by: Yuvaraj Kumar C D <yuvaraj.cd@samsung.com>
Tested-by: Vivek Gautam <gautam.vivek@samsung.com>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
The 25 MHz reference clock has better stability so its use is preferred over the
core clock.
This commit takes advantage of the already introduced Armada 375 devicetree
compatible string and adds a new timer initialization. If available, the timer
will use the reference clock (named as 'fixed'). Otherwise, it falls back to the
previous behavior.
Acked-by: Jason Cooper <jason@lakedaemon.net>
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Acked-by: Wim Van Sebroeck <wim@iguana.be>
Reviewed-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
The 25 MHz reference clock has better stability so its use is prefered over the
core clock. Change the Armada 375 clock initialization to use this reference
clock. To ensure the driver is compatible with an old devicetree, also provide
a fallback path which will silently return to the previous behavior.
While here, add the clock specification to the binding documentation.
Acked-by: Jason Cooper <jason@lakedaemon.net>
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Acked-by: Wim Van Sebroeck <wim@iguana.be>
Reviewed-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
The memory controller on NVIDIA Tegra exposes various knobs that can be
used to tune the behaviour of the clients attached to it.
In addition, the memory controller implements an SMMU (IOMMU) which can
translate I/O virtual addresses to physical addresses for clients. This
is useful for scatter-gather operation on devices that don't support it
natively and for virtualization or process separation.
Signed-off-by: Thierry Reding <treding@nvidia.com>
If pre-filled framebuffer nodes are used, the firmware may need extra
properties to find the right node. This documents the properties to use
for this on sunxi platforms.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Grant Likely <grant.likely@linaro.org>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
This goes contrary to how devicetree usually works, so drop it. Instead if
the firmware needs to be able to find a specific node it should use a
platform specific compatible + properties for this.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Grant Likely <grant.likely@linaro.org>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
SOF_TIMESTAMPING_OPT_ID puts the id in ee_data, not ee_info.
Cc: Willem de Bruijn <willemb@google.com>
Signed-off-by: Andy Lutomirski <luto@amacapital.net>
Acked-by: Willem de Bruijn <willemb@google.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Add information which regulators can be disabled during system suspend.
Suggested-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
The HLCDC IP available on some Atmel SoCs (i.e. at91sam9n12, at91sam9x5
family or sama5d3 family) exposes 2 subdevices:
- a display controller (controlled by a DRM driver)
- a PWM chip
This patch adds documentation for atmel-hlcdc DT bindings.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Tested-by: Anthony Harivel <anthony.harivel@emtrion.de>
Tested-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
This patch add haptic DT binding documentation and example
to support haptic driver in max77693 Multifunction device.
Signed-off-by: Jaewon Kim <jaewon02.kim@samsung.com>
Acked-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
This patch adds the binding documentation for Samsung S2MPS13 PMIC
which is similiar with existing S2MPS14 PMIC. S2MPS13 has the different number
of regulators from S2MPS14 and RTC/Clock is the same with the S2MPS14.
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Sangbeom Kim <sbkim73@samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Add documentation and script to obtain required firmware.
Signed-off-by: Ondrej Zary <linux@rainbow-software.org>
Reviewed-by: Hannes Reinecke <hare@suse.de>
Signed-off-by: Christoph Hellwig <hch@lst.de>
Add unittests for OF overlays.
It tests overlay device addition/removal and whether
the apply revert sequence is correct.
Changes since V1:
* Added local fixups entries.
Signed-off-by: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
Signed-off-by: Grant Likely <grant.likely@linaro.org>
Overlays are a method to dynamically modify part of the kernel's
device tree with dynamically loaded data. Add the core functionality to
parse, apply and remove an overlay changeset. The core functionality
takes care of managing the overlay data format and performing the add
and remove. Drivers are expected to use the overlay functionality to
support custom expansion busses commonly found on consumer development
boards like the BeagleBone or Raspberry Pi.
The overlay code uses CONFIG_OF_DYNAMIC changesets to perform the low
level work of modifying the devicetree.
Documentation about internal and APIs is provided in
Documentation/devicetree/overlay-notes.txt
v2:
- Switch from __of_node_alloc() to __of_node_dup()
- Documentation fixups
- Remove 2-pass processing of properties
- Remove separate ov_lock; just use the DT mutex.
v1:
- Drop delete capability using '-' prefix. The '-' prefixed names
are valid properties and nodes and there is no need for it just yet.
- Do not update special properties - name & phandle ones.
- Change order of node attachment, so that the special property update
works.
Signed-off-by: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
Signed-off-by: Grant Likely <grant.likely@linaro.org>
This driver is very similar to the macvlan driver except that it
uses L3 on the frame to determine the logical interface while
functioning as packet dispatcher. It inherits L2 of the master
device hence the packets on wire will have the same L2 for all
the packets originating from all virtual devices off of the same
master device.
This driver was developed keeping the namespace use-case in
mind. Hence most of the examples given here take that as the
base setup where main-device belongs to the default-ns and
virtual devices are assigned to the additional namespaces.
The device operates in two different modes and the difference
in these two modes in primarily in the TX side.
(a) L2 mode : In this mode, the device behaves as a L2 device.
TX processing upto L2 happens on the stack of the virtual device
associated with (namespace). Packets are switched after that
into the main device (default-ns) and queued for xmit.
RX processing is simple and all multicast, broadcast (if
applicable), and unicast belonging to the address(es) are
delivered to the virtual devices.
(b) L3 mode : In this mode, the device behaves like a L3 device.
TX processing upto L3 happens on the stack of the virtual device
associated with (namespace). Packets are switched to the
main-device (default-ns) for the L2 processing. Hence the routing
table of the default-ns will be used in this mode.
RX processins is somewhat similar to the L2 mode except that in
this mode only Unicast packets are delivered to the virtual device
while main-dev will handle all other packets.
The devices can be added using the "ip" command from the iproute2
package -
ip link add link <master> <virtual> type ipvlan mode [ l2 | l3 ]
Signed-off-by: Mahesh Bandewar <maheshb@google.com>
Cc: Eric Dumazet <edumazet@google.com>
Cc: Maciej Żenczykowski <maze@google.com>
Cc: Laurent Chavey <chavey@google.com>
Cc: Tim Hockin <thockin@google.com>
Cc: Brandon Philips <brandon.philips@coreos.com>
Cc: Pavel Emelianov <xemul@parallels.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This adds documentation of device tree bindings for the Amlogic Meson
SPIFC (SPI Flash Controller).
Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJUcmzrAAoJEHm+PkMAQRiGUskH/il9ul71lyyvrA/bRbi0GfUa
2Ej1Q4Fa/SRzLMiWF8Wy/AlYBbl4/uD3a3XEueK4f9dNguTLZF/rwXTlKKzUeiGg
zFObbJg3zfa926PQcEV5mc+h71ZkWmbH5CjF6GfYIlj6kjVa5MXF3lSZz27DoAx3
DjoLKpj1fXQJu1HD7xvUn0r720RgYfic9iKdS69eEYex+Js92WySukogvMG5WAVD
xuwlJcJgm0YpgNr1t1ij4ekE5XR9jjiE4EXbOZYWcOOd+YXAwZpBrKOgxP0gma3w
OGwEvmAbzf/3IsGq3dPFYWQ2nfiLA/Qh7y20E19FLKpPBu5ZuTEgFU8VTxh+k+g=
=rRmA
-----END PGP SIGNATURE-----
Merge tag 'v3.18-rc6' into devicetree/next
v3.18-rc6 contains an important DT bug fix, c1a2086e2d, "of/selftest:
Fix off-by-one error in removal path" which affects testing of the
overlay patch series. Merge it into the devicetree/next staging branch
so that the overlay patches are applied on top of a known working tree.
Linux 3.18-rc6
Conflicts:
drivers/of/address.c
Drop the now unused reason argument from the ->change_queue_depth method.
Also add a return value to scsi_adjust_queue_depth, and rename it to
scsi_change_queue_depth now that it can be used as the default
->change_queue_depth implementation.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Reviewed-by: Mike Christie <michaelc@cs.wisc.edu>
Reviewed-by: Hannes Reinecke <hare@suse.de>