A fix for r8a7779 clocks.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.12 (GNU/Linux)
iQIcBAABAgAGBQJREH3GAAoJENfPZGlqN0++N2MP/3r5TBfXBowsC0IbIbu/MRQZ
mKvQh4W0E7O9i5n7EAgDTdyx1q9GjnhdZv1YKznjLRBe30m1d5yHEemNNWIz9FqH
fLQNmKQVxTpo/Ounn1i4assBRZInPbbt59EwZpKNZwGF4uNh14f/OPJ6DcmE3jF+
xwvLHtTlBamqjVpbD8yGXfAq5+VZLBW60+a8KWkDAiYHMLJ0rFnIbEnsaCH3ALNt
pI5D2GkJHxRRuc4xSn6+d7AstzyZ1AwqXBwZk7Niye4VWo9VxPygwaFkZqiTvviY
GRFCwG3GGcCMjiBPcnHNNRFv/Wsmm66441arKBFMTj0jAU4STF/6LU8d6e1Cvs56
C7a6xok5rQyEgShcAN8WQFSwiexIU4GJtxJ+JloziBU0tEWe2ZFiluw4X2BWWp0s
ecr5jkJw5ZqOx/MHhZn2WmjT7BcsFotwdBeKLB2J7WkD7ZoW0pUIPoe9gFE/r5in
/WdhiFbifDL/5E9viS66OpeTa+i2/vbdJAEeP0PJfB2W8OWPdztlEgj7Vy6F/2o9
cxlhUPSRPXdT54UNTIu36LxVd4oOu8XcZ1JHp8UCdCLmb9KkbLYbA+oHMaeSF1o5
WFbb3+t8cYMi2PWrde9yGfikNsd/QnNxosULBhAetRDMM7ECCBkGcl7eAeTYocSr
PG6tufypi9YHbJfmyUiD
=FX9R
-----END PGP SIGNATURE-----
Merge tag 'renesas-soc3-for-v3.9' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc
From Simon Horman:
Third round of Renesas ARM-based SoC changes for v3.9
A fix for r8a7779 clocks.
* tag 'renesas-soc3-for-v3.9' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: r8a7779: Correct TMU clock support
- use rtc-mv in mvebu armv7 SoCs
- add pci-e hotplug for kirkwood
Depends on:
- tags/mvebu_fixes_for_v3.8-rc6
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2.0.19 (GNU/Linux)
iQEcBAABAgAGBQJRCqOnAAoJEAi3KVZQDZAewlUH/04tpMdf2rvgNP8uUVPVx62T
cXMga9qLTyXQ9hn31KP7fd/JPLRJFsG/+jy4x687EurJGIXXaWGNadjlE69DEPAZ
jt78sPa+Mo/xYD4XoNCr/ng1cbnTwc1ebSRSfN+nIjWynE8Do7tkOKxfJodTgQCM
XbE3EHfvAktKfJTsFDPsFwoIycEYxFsN4jQPwiCdPHVb24py3FWBy+qep7wtLfSO
gTnakEcOsQc7aFzrFdZ1ZnQ9KRlBYXVN636o4sQkM+UM9Vf7FAWBM4OCi2KP4trU
IlTzknoMAMYat+AtYzq1FcDmajeP/EgG6DbQh7lqUK0LEILn2rdAUlgN2QB3VIs=
=6oef
-----END PGP SIGNATURE-----
Merge tag 'drivers_for_v3.9' of git://git.infradead.org/users/jcooper/linux into next/soc
From Jason Cooper:
mvebu drivers for v3.9
- use rtc-mv in mvebu armv7 SoCs
- add pci-e hotplug for kirkwood
Depends on:
- tags/mvebu_fixes_for_v3.8-rc6
* tag 'drivers_for_v3.9' of git://git.infradead.org/users/jcooper/linux:
cpuidle: kirkwood: Move out of mach directory
rtc: Add support of rtc-mv for MVEBU SoCs
ARM: Kirkwood: Support basic hotplug for PCI-E
arm: mvebu: i2c come back in defconfig
arm: plat-orion: fix printing of "MPP config unavailable on this hardware"
Dove: activate GPIO interrupts in DT
- It's based on imx-cleanup-3.9 to avoid conflicts.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQEcBAABAgAGBQJRCRzjAAoJEFBXWFqHsHzOOTYH/2YiAhCXDoovJ++leTTBKoFO
kRx2gvV0oxQYAjvRX4IiiwcuWjbCQI8ugiKxeH9Vn+jwHD8jKqzTINEUVQfKUud6
s8AI1/EqKwKnEFYFs/Fg6WxZHuHpoL/clpRB/5wZw1KoChmte2OnVU7d9vOt67iN
l0P4nPR18iwU5LFoDCnqMX50Dp9C56KEF2JhzBCQKW9TtRclwpcBNy6AsHb/TNOe
/nHN+Ku6/3xQEz2MPQ9QdmgFxnp9Pr8R6leJNg1Vg6UGRYrKxy0zVo+oFEXAZuUw
v6gnhdlvO6Ki/IKHcWkw7Q7pUDTuB6SttirQE9mBlPdc0V3kTU82SVtX9WAQhSs=
=rVol
-----END PGP SIGNATURE-----
Merge tag 'imx6q-cpudile-3.9' of git://git.linaro.org/people/shawnguo/linux-2.6 into next/soc
From Shawn Guo:
imx6q cpuidle support for 3.9
- It's based on imx-cleanup-3.9 to avoid conflicts.
* tag 'imx6q-cpudile-3.9' of git://git.linaro.org/people/shawnguo/linux-2.6:
ARM: imx6q: support WAIT mode using cpuidle
ARM: imx: move imx6q_cpuidle_driver into a separate file
ARM: imx: mask gpc interrupts initially
ARM: imx: return zero in case next event gets a large increment
ARM: imx: Remove mx508 support
ARM: imx: Remove mach-mx51_3ds board
ARM: imx: use debug_ll_io_init() for imx6q
ARM: imx: remove unused imx6q_clock_map_io()
ARM: mach-imx: Kconfig: Do not select Babbage for MACH_IMX51_DT
Signed-off-by: Olof Johansson <olof@lixom.net>
Still, two delete/change conflicts caused by imx/cleanup:
arch/arm/mach-imx/mach-mx50_rdp.c
arch/arm/mach-imx/mach-mx51_3ds.c
Fix the issue:
tree: git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc.git next/soc
head: 6ed05a2aab
commit: af70fdc947 [4/8] Merge branch 'marco-timer-cleanup-rebase' of
git://gitorious.org/sirfprima2-kernel/sirfprima2-kernel into next/soc
config: make ARCH=arm prima2_defconfig
All error/warnings:
>> arch/arm/mach-prima2/platsmp.c:20:30: fatal error: asm/hardware/gic.h: No such file or directory
compilation terminated.
--
>> arch/arm/mach-prima2/common.c:15:30: fatal error: asm/hardware/gic.h: No such file or directory
compilation terminated.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Cc: Xie ChanglongX <changlongx.xie@intel.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
During code review it was noticed that the clock value for
TMU01 was incorrect and the value for TMU02 was missing.
For reference: As of 3.8-rc6 there are no in-tree consumes of these clocks.
Reported-by: Denis Oliver Kropp <dok@directfb.org>
Reviewed-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* Changes to allow unplugging of CPU0 by Ulrich Hecht.
* Changes to add reg and device_type properties to cpus
device trees entries by Simon Horman.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.12 (GNU/Linux)
iQIcBAABAgAGBQJRCgzaAAoJENfPZGlqN0++tgEP/RxzNKMXnJ6h6125DD8clPOj
ss8A10YEMlnJX7jtBVrKJeS2RQcsuAHkQ5wojOb/DqZQf5OeVO90n4JotNO9g9F6
cFMq/E6UEGK1zLZ+uauoexbQvVv6pPVL06aSncoVElrhSiu+509aybb5jHALNouc
BrJXzgSyJMlSgL//sqZYtuQraAZo4IWeyzwF8giJs4seyb39JhW5J3uEbCVFklyW
G4qLvoU3z95k96J70YhYYNrNE/1FezzEQyOrns1MnirGsohTn1XSuyt3jzaBzgyI
kMFBo1lYByOed9Qcysv+lUQgA2jO2vJ7VX0PQI20SGDHwzUu8J272Nq54se6gX9M
TKQbYg9LqvfE/He5H9AuIcnpHiVrYArIoGAE2gPsr/NEnGVVwEnCqF87gNe1NDWk
OIpeCbt3AuN4fae+C1G5ohXFmTTndrHybZZfjb5Jd3ty282gbER64MubiK9Kfocj
0KC0IS/Emz5TK/2CsBTq2uSFFG0SlNZw4JcIgH4EjWE71++dSYQwVWrucaB5JEps
q8EZWQd1JwRp0KehJN6MgpLMyG3ilFnErEC1O8U9iKcgxFVyLXB05fG2e5Yn6IBp
eoXVOxPvJpLQJlBvJ7mNIyykSs+txuerUyC3WlIRa6gjiEf95e9y2gca4pYcNesk
ED4IZ2whWihxC9HsI7nC
=l7OU
-----END PGP SIGNATURE-----
Merge tag 'renesas-soc2-for-v3.9' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc
From Simon Horman:
Second round of Renesas ARM-based SoC changes for v3.9
* Changes to allow unplugging of CPU0 by Ulrich Hecht.
* Changes to add reg and device_type properties to cpus
device trees entries by Simon Horman.
* tag 'renesas-soc2-for-v3.9' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: mach-shmobile: sh73a0: allow unplugging of CPU0
ARM: mach-shmobile: add shmobile_cpu_disable_any()
ARM: mach-shmobile: emev2: Add reg and device_type properties to cpus
ARM: mach-shmobile: sh73a0: Add reg and device_type properties to cpus
Signed-off-by: Olof Johansson <olof@lixom.net>
Move the Kirkwood cpuidle driver out of arch/arm/mach-kirkwood and
into drivers/cpuidle. Convert the driver into a platform driver.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Unconditionally register the PCI-E bus, even if the link is currently
down. When the link is brought up the bus can be scanned through
/sys/bus/pci/rescan or otherwise. Since the HW has no interrupt for
link up, userspace will have to take care of the timing.
An earlier version of this was contingent on CONFIG_HOTPLUG, but
that is being removed from the kernel.
This also fixes printing the link up/down message to be displayed
on one line (structured logging broke this?)
Signed-off-by: Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
- add missing gpio interrupt lines to dove dt
- fix bad logic for printing MPP error message on orion boards
- build proper serial port driver after changing mvebu DT compatible property
- This is a change to mvebu_defconfig that I wouldn't usually push out as a
fix. However, the commit
b24212f arm: mvebu: Use dw-apb-uart instead of ns16650 as UART driver
changed the serial driver for the board in the dts file. without the patch
I've included in this pull, users won't see any log messages.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2.0.19 (GNU/Linux)
iQEcBAABAgAGBQJRB+cvAAoJEAi3KVZQDZAej/MH/2eWE2N3eTs8PRshCUoEIQxd
4uConsKhPiIyNK1rHePGI4EY/M07yxYRO7/55ajK5J3NiqxO7N8n0RYIMFsgNoC9
LCPpi2Ts6Rpj87jqj7ION6pfCiIDPE+Lj4hNQAVTuQAMrh04UqaDLHwpfQztETxW
C6X9A8ae+fVFfVQN0AusStImklxv5hf4odUhqvSKd6gy6n20KtV4EQQN+t+OLSgx
IsRUVww6cfqYFNYDWhyWg8SLppIp9m44hluS8f/wPT9zh5Wf6XWnvAZz41cqaf44
FpzURzHQGcmetqPv/MWL9YSCMTSmBxLfW4totTq2wgldl6qQc7bJsF3R0HlsUgc=
=EA67
-----END PGP SIGNATURE-----
Merge tag 'tags/mvebu_fixes_for_v3.8-rc6' into mvebu/drivers
fixes for v3.8-rc6
- add missing gpio interrupt lines to dove dt
- fix bad logic for printing MPP error message on orion boards
- build proper serial port driver after changing mvebu DT compatible property
- This is a change to mvebu_defconfig that I wouldn't usually push out as a
fix. However, the commit
b24212f arm: mvebu: Use dw-apb-uart instead of ns16650 as UART driver
changed the serial driver for the board in the dts file. without the patch
I've included in this pull, users won't see any log messages.
Add WAIT mode (ARM core clock gating) support to imx6q cpuidle driver.
As WAIT mode is broken on imx6q TO 1.0 and 1.1, it only enables the
support for revision 1.2 with chicken bit set.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Move imx6q_cpuidle_driver into a separate file as more codes will
be added when WAIT mode gets implemented as cpuidle.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
The return of v2_set_next_event() will lead to an infinite loop in
tick_handle_oneshot_broadcast() - "goto again;" with imx6q WAIT mode
(to be enabled). This happens because when global event did not expire
any CPU local events, the broadcast device will be rearmed to a CPU
local next_event, which could be far away from now and result in a
max_delta_tick programming in set_next_event().
Fix the problem by detecting those next events with increments larger
than 0x7fffffff, and simply return zero in that case.
It leaves mx1_2_set_next_event() unchanged since only v2_set_next_event()
will be running with imx6q WAIT mode support.
Thanks Russell King for helping understand the problem.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
sh73a0 deals fine with disabling any core, so we should permit it.
Signed-off-by: Ulrich Hecht <ulrich.hecht@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Method to disable any core to be used on platforms where CPU0 does not
need special treatment.
Signed-off-by: Ulrich Hecht <ulrich.hecht@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The bcm2835 clock driver is enhanced to allow fixed clocks to be probed
from device tree.
A system power-off implementation is added.
This branch is based on v3.8-rc3.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJRB2t5AAoJEJuNpwkmVCGcGpEP/RCuccnBem2L76YR357qtes+
eRUUyYVeway5W7gaM4h0L+QJfSSd+KxzvEWdrrNHSFXN+fpyLdGVz3R7uXn5m3Rs
ffrxyVEERNB+g3ASb5NOlDM29sSsakFX92EOGlR/ZPbgjLpiqBtzOu9I4NouZtSk
WxOWhZQ9xA2gyV238LkD+5OUmbu19GayXex8j123SMcIiM45JCvAeBtr9WykcXiW
DliXStZT73t/cL/t+TeqRX6cBfV8XLKwlh95vl3zBSwri2vjX8nTpuNgpKqByass
/j7c7XnZYUTmtvxPqSK3I20jNqpzWCmpP7jjcdp05belKr3c6JQpgaFtjdzpQ44Y
AbXTlHXuQC78jK0utE+ZE7gGt8WR0l+p4H0TLUt+3k5ny+TsVMFDpfVZlbqURr6k
iBLFgNCbpCDH+UXoLQb4HiQg5QaMKtDuQNztRJWwDAuyXMKWPN3alv9lGP/FUrIy
oGqZtthN9Dds6xLZOaZqVO/O5LJF9HweDM01PikhgK9jwiBZVTcrXWQHlb/IH/nN
beBfqaH8c0c/+QwQNSR4vSVS2b3r4u/mxUeufqcgtvbNfys9PRzntvV92qgEs/ma
tR6zKxvQADxlhi3vrRkC39L/zcMPWEDcyuqdAQ8FW6/4yljEUW3mHXY/H6eVkXCg
xPCSzREtfVcN5ULXxYKP
=Up/B
-----END PGP SIGNATURE-----
Merge tag 'bcm2835-for-3.9-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-rpi into next/soc
From Stephen Warren:
ARM: bcm2835: SoC driver updates
The bcm2835 clock driver is enhanced to allow fixed clocks to be probed
from device tree.
A system power-off implementation is added.
This branch is based on v3.8-rc3.
* tag 'bcm2835-for-3.9-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-rpi:
ARM: bcm2835: add a pm_power_off implementation
clk: bcm2835: probe for fixed-clock in device tree
Signed-off-by: Olof Johansson <olof@lixom.net>
This pull request:
1) Fixes a bug with the way SPI devices were registered on DA850
2) Adds support for DSP clock and resetting the DSP on DA850
3) Fixes checkpatch issue with some existing files.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.10 (GNU/Linux)
iQIcBAABAgAGBQJRB4xgAAoJEGFBu2jqvgRNIdMP/2tB1Of5vHyIrXw9LViGVLwt
SQr6Ny89vb+2i83/rlvOEweRBOLOCxBgP9sruWrfLy4WJcT5AqCxHXy3rFAZAESt
Zeg2LheEOcO1iFHPfGd5nCejrP9mUYQ5sYHrFXDAJ1XEhzNAwXiULsXaSXaoD4rG
VfmKBxdf2T4nonkvpgqS37YZQAtFnmYCzd/dTg67Dp0SYazHV141NLxF1nYbLsYl
VubB7k/svGxtqZ1XhbiP+vA7t6seGInPC7+MzKy0tUkDp3l6pa8+mB0H9HDBNQAc
Bc9sVz2Ib8NCgyrDjtdu3Mw0FKj5mLxh81sWKJsgmx3v5yNUGIlHh3zukfHUv455
hMRMkJDSGPhhsyrB5rWfTiDSD+cbUoiNQPBr4JsAFmivlximE14Ev69Jc2MKL53Q
xvuCQUT9OrHvcZekj1K7Hf6cU6LOn0qdFen39vDqD24SwN1SIi26mInHnQnsuS72
D3EhaJw3QwZNH3gzstnqwRfhQSgwCTG0+2ecgijuvcsBo/paAWw7WZOHKhCzmlP0
wJKI1NmKLggnEbY/WffKUz5q3SsOo0NhsawTOh1wO6US1njPrYiQcu42h72aWVO3
bZsItc7MCX6Rw+D9sLvOJcgWxAu6AWYBzJgHzUugF5dzmbgv5WjynUDDcx4057p8
mgmWzsfv/kJvIimThWhd
=J9AI
-----END PGP SIGNATURE-----
Merge tag 'davinci-for-v3.9/soc' of git://gitorious.org/linux-davinci/linux-davinci into next/soc
From Sekhar Nori:
DaVinci SoC changes for v3.9
This pull request:
1) Fixes a bug with the way SPI devices were registered on DA850
2) Adds support for DSP clock and resetting the DSP on DA850
3) Fixes checkpatch issue with some existing files.
* tag 'davinci-for-v3.9/soc' of git://gitorious.org/linux-davinci/linux-davinci:
ARM: davinci: da850: add dsp clock definition
ARM: davinci: psc: introduce reset API
ARM: davinci: psc.c: change pr_warning() to pr_warn()
ARM: davinci: devices-da8xx.c: change pr_warning() to pr_warn()
ARM: davinci: da8xx_register_spi() should not register SPI board info
Signed-off-by: Olof Johansson <olof@lixom.net>
From Simon Horman, a series of SoC updates for shmobile.
* 'soc' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: r8a7779: scif .irqs used SCIx_IRQ_MUXED()
ARM: mach-shmobile: sh73a0: Initialise MMCIF using DT
ARM: mach-shmobile: sh73a0: Minimal setup using DT
ARM: mach-shmobile: sh73a0: Allow initialisation of GIC by DT
ARM: SH-Mobile: sh73a0: Add CPU Hotplug
ARM: SH-Mobile: sh73a0: Secondary CPUs handle own SCU flags
ARM: shmobile: r8a7740: Add CPU sleep suspend
ARM: shmobile: sh73a0: Add CPU sleep suspend
ARM: shmobile: add function declarations for sh7372 DT helper functions
ARM: sh7372: fix cache clean / invalidate order
ARM: sh7372: add clock lookup entries for DT-based devices
ARM: mach-shmobile: sh73a0 external IRQ wake update
ARM: shmobile: sh73a0: fixup div4_clks bitmap
ARM: shmobile: r8a7740: add TMU timer support
ARM: shmobile: Remove duplicate inclusion of dma-mapping.h in setup-r8a7740.c
Signed-off-by: Olof Johansson <olof@lixom.net>
Fix trivial conflict in board_bcm due to Simon resolving the same conflict
with one less line of whitespace. Keeping end result common with what
we already have in arm-soc.
Conflicts:
arch/arm/mach-bcm/board_bcm.c
Only mx508 based board is mach-mx50_rdp and it has been marked as BROKEN
for several releases.
mx508 currently lacks clock support.
In case someone needs to add mx508 support back, then the recommended approach
is to use device tree.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
mach-mx51_3ds only supports old silicon version of MX51 and was replaced
with mx51 babbage, which is the official MX51 development board.
No need to maintain it anymore.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Use debug_ll_io_init() to map low level debug port for imx6q, so that
arch/arm/mach-imx/lluart.c can be removed.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
imx6q_clock_map_io() becomes an empty function since imx6q clock driver
is moved to common clock framework. It's used nowhere now. Remove it.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Mostly clock related updates, most notably the conversion of
i.MX31 to a DT based lookup.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.12 (GNU/Linux)
iQIcBAABCAAGBQJRAlqyAAoJEPFlmONMx+ezY8IP/20XCxrkzeCJK04OuyzPRDBS
ejxD/fDjQyw5fArzHZgK5lIG1rhGOmeSdbG/8xlYpBqgzPOZtdd7NlNZvqkLo+Cq
Mu0SLTNM9zY9ibA8vGbyFUEqMX3iKL9Gk6zm3yu/DGX7WqyhObNQhN0yfvgySBJ9
fsQD1BEzm0U60BKiumbNH+sHNSDR6ZTB0Q3lbE42GwUqOax9c6ObrqibB+LRyNDd
7WkwkyhFSXG8MyBfLtIw4HorinewGEdwKZ2GSY/QstADKkWpA0qW7IXtCfk76sRy
8E018twHCpRT9wK6UEWIxDj7qLiEEDJsCHsxGaxFP8dRnOM0+Q96idVlI4Uyqwxz
UbHjIf9XuSXfosJrt4bAE4dLfUHndCFmeU99lOOXefnpFghlgPQFYltOZGaUs5YF
BP+j/AV3L0ElyXPFAz2qVEYpcwJjZF0Ik9Ph0AuZva5aifC2g4dRdJ7W9TRmVul/
louSSrMrIFZcDokUchisfJED10Ln4nmKQ5SS5iRa+TYa3Two25kDtQeetouPRzqt
E4MOsf9AcTT2in2ojvQ27ZpaEzYIHjfPkfrV7POMbm+hTTTzoHlJq1ZOIlj4ENxQ
pL3SP7s07neY/9XnaAvuJQTQqihquBXjrrhEDUfobspBnHV/SBRr7AZyATYgouyY
oCfCcrRNm6NBj+aecbEP
=bWtE
-----END PGP SIGNATURE-----
Merge tag 'imx-soc' of git://git.pengutronix.de/git/imx/linux-2.6 into next/soc
From Sascha Hauer:
ARM i.MX SoC updates for next
Mostly clock related updates, most notably the conversion of
i.MX31 to a DT based lookup.
* tag 'imx-soc' of git://git.pengutronix.de/git/imx/linux-2.6:
ARM: clk-imx35: Fix build warnings with W=1
ARM: imx27: add a clock gate to activate SPLL clock
ARM: mx31: Replace clk_register_clkdev with clock DT lookup
ARM: clk-imx31: Add dummy clock
ARM: Let CONFIG_MACH_IMX31_DT be built by default
Signed-off-by: Olof Johansson <olof@lixom.net>
From Barry Song, this adds support for a new SoC from CSR; marco. It's
SMP, uses GIC instead of VIC and in general needs a bit of rework of
the platform code for setup, which this branch contains.
* 'marco-timer-cleanup-rebase' of git://gitorious.org/sirfprima2-kernel/sirfprima2-kernel:
ARM: PRIMA2: provide two DEBUG_LL ports for prima2 and marco
ARM: PRIMA2: add new SiRFmarco SMP SoC infrastructures
ARM: PRIMA2: irq: make prima2 irq can work even we enable GIC for Marco
ARM: PRIMA2: rtciobg: it is also compatible with marco
ARM: PRIMA2: rstc: enable the support for Marco
ARM: PRIMA2: mv timer to timer-prima2 as we will add timer-marco
ARM: PRIMA2: initialize l2x0 according to mach from DT
ARM: PRIMA2: enable AUTO_ZRELADDR for SIRF in Kconfig
ARM: PRIMA2: add CSR SiRFmarco device tree .dts
Signed-off-by: Olof Johansson <olof@lixom.net>
Fix the following warnings when building with W=1 option:
arch/arm/mach-imx/clk-imx35.c: In function 'mx35_clocks_init':
arch/arm/mach-imx/clk-imx35.c:70:12: warning: old-style function definition [-Wold-style-definition]
arch/arm/mach-imx/clk-imx35.c:201:16: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
A clock gate is mandatory to activate SPLL clock needed, at least, for usb.
Signed-off-by: Gwenhael Goavec-Merou <gwenhael.goavec-merou@armadeus.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Similarly as it was done for mx6q, use a DT lookup in order to make maintainance
task for the clock devices easier.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add dummy clock as it is required by some i.mx drivers.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Let CONFIG_MACH_IMX31_DT be built by default.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch tidyup scif .irqs settings by using
SCIx_IRQ_MUXED() macro.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This device also requires a voltage regulator which
should be defined in a board-specific maner. An example
dts snipped follows.
/ {
fixedregulator1v8: fixedregulator@0 {
compatible = "regulator-fixed";
regulator-name = "fixed-1.8V";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
};
&mmcif {
vmmc-supply = <&fixedregulator1v8>;
vqmmc-supply = <&fixedregulator1v8>;
};
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Allow a minimal setup of the sh73a0 SoC using a flattened device tree.
In particular, Configure the i2c controllers using a flattened device tree.
SCI serial controller and CMT clock source, whose drivers do not yet
support configuration using a flattened device tree, are still configured
using C code in order to allow booting of a board with this SoC.
*** Please note that the clock initialisation scheme used in
this patch does not currently work with SMP as there
is a yet to be resolved lock-up in workqueue initialisation.
CONFIG_SMP must be disabled when using this code. ***
Includes update from Thierry Reding to no longer use gic_handle_irq()
Cc: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
fix
This allows the GIC interrupt controller of the sh73a0 SoC to be
initialised using a flattened device tree blob.
It does not allow the INTC interrupt controller which is also present on
the sh73a0 SoC to be enabled via device tree. Nor does it handle sharing
of interrupts between the GIC and INTC interrupt controllers.
This limits the usefulness of this code to applications which only wish to
access devices which use interrupts that can be handled by the GIC
interrupt controller. Other applications should, for now, continue using
non-device tree initialisation of the sh72a0 interrupt controllers.
Includes update to use irqchip_init() by Thierry Reding
Cc: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add the capability to add and remove CPUs on the fly.
The Cortex-A9 offers the possibility to take single cores out of the
MP Core. We add this capabilty taking care that caches are kept
coherent. For verifying the shutdown we rely on the internal SH73A0
Power Status Register PSTR.
Signed-off-by: Bastian Hecht <hechtb+renesas@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
When booting secondary CPUs we have used the main CPU to set up the
Snoop Control Unit flags of these CPUs. It is a cleaner approach
if every CPU takes care of its own flags. We avoid the need for
locking and the program logic is more concise. With this patch the file
headsmp-sh73a0.S is added that contains a startup vector for secondary CPUs
that sets up its own SCU flags.
Further in sh73a0_smp_prepare_cpus() we can rely on the generic ARM helper
scu_power_mode(). This is possible as we don't cross borders anymore (every
CPU handles its own flags) and need no locking. So we can throw out the
needless function modify_scu_cpu_psr().
Signed-off-by: Bastian Hecht <hechtb+renesas@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add the lighest possible sleep mode on Cortex-A9 cores: CPU sleep.
It is entered by a simple dsb and wfi instruction via cpu_do_idle(). As
just clocks are stopped there is no need to save or restore any state of
the system.
Signed-off-by: Bastian Hecht <hechtb+renesas@gmail.com>
Acked-by: Magnus Damm <damm@opensource.se>
[ horms@verge.net.au: Added missing includes ]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add the lighest possible sleep mode on Cortex-A9 cores: CPU sleep. It is
entered by a simple dsb and wfi instruction via cpu_do_idle(). As just
clocks are stopped there is no need to save or restore any state of the
system.
Signed-off-by: Bastian Hecht <hechtb+renesas@gmail.com>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
sh7372_add_early_devices_dt() and sh7372_add_standard_devices_dt() are
defined as global functions in arch/arm/mach-shmobile/setup-sh7372.c,
but their declarations are missing. Add them to common.h, where similar
functions for this and other SoC types are already declared.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Simon Horman <horms@verge.net.au>
According to the Cortex A8 TRM the L2 cache should be first cleaned and
then disabled. Fix the swapped order on sh7372.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
When booting with DT, devices are named differently. To get their clocks
additional entries have to be added to the lookup table.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Simon Horman <horms@verge.net.au>
Use sh73a0_set_wake() for external IRQ signals on sh73a0.
The sh73a0 IRQ hardware for external IRQ pins consists of
the INTCA interrupt controller and the GIC together doing
their best to limp along. These external IRQ pins are
treated as a special case where interrupts need to be
managed in both interrupt controllers in parallel.
The ->irq_set_wake() callback for the external IRQ pins
can be dealt with in the same way as INTCA-only without
involving the GIC. So this patch updates the external
IRQ pin code for sh73a0 to no longer involve the GIC.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
div4_clks's bitmap of sh73a0 was wrong.
This patch is based on v2.0 datasheet.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This patch enabled TMU0 timer on r8a7740.
But TMU1 timer is not supported yet
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Pull ARM fixes from Russell King:
"A number of fixes:
Patrik found a problem with preempt counting in the VFP assembly
functions which can cause the preempt count to be upset.
Nicolas fixed a problem with the parsing of the DT when it straddles a
1MB boundary.
Subhash Jadavani reported a problem with sparsemem and our highmem
support for cache maintanence for DMA areas, and TI found a bug in
their strongly ordered memory mapping type.
Also, three fixes by way of Will Deacon's tree from Dave Martin for
instruction compatibility and Marc Zyngier to fix hypervisor boot mode
issues."
* 'fixes' of git://git.linaro.org/people/rmk/linux-arm:
ARM: 7629/1: mm: Fix missing XN flag for for MT_MEMORY_SO
ARM: DMA: Fix struct page iterator in dma_cache_maint() to work with sparsemem
ARM: 7628/1: head.S: map one extra section for the ATAG/DTB area
ARM: 7627/1: Predicate preempt logic on PREEMP_COUNT not PREEMPT alone
ARM: virt: simplify __hyp_stub_install epilog
ARM: virt: boot secondary CPUs through the right entry point
ARM: virt: Avoid bx instruction for compatibility with <=ARMv4
Here's a long-pending fixes pull request for arm-soc (I didn't send one
in the -rc4 cycle).
The larger deltas are from:
- A fixup of error paths in the mvsdio driver
- Header file move for a driver that hadn't been properly converted to
multiplatform on i.MX, which was causing build failures when included
- Device tree updates for at91 dealing mostly with their new
pinctrl setup merged in 3.8 and mistakes in those initial configs
The rest are the normal mix of small fixes all over the place; sunxi,
omap, imx, mvebu, etc, etc.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJRAV2RAAoJEIwa5zzehBx32N0P/AsFOLaVWjuvf3kBZTaZgp3J
jZjhmAfJ2dQCITA792U2bI0d+gPiXm49EY3KWaNdb7S2UmQ1MwXHhKOwOQSVXli0
j+qAgVUa4nSsi3FQesKS0zThG/Xr+RsyiJZ2dHu71hendJu5NB1O1hzO4hDEHkMc
K8NGglKjtGirEiLIoub9ag8E9k5sd8X4nulrEJclon1BoolPcef18Bs96tdPmq/o
Ss634vBqhzSE8OInFc6RDNzTSM52zXbornr/5xGAvFqQv6L0rSXHPvjeeWVdNjj1
aNqkOrQOAHWRwTcyHOR0GdJfuAPSUwF+JkBWcUbgmsda7XunFiSb5tKV3FSVbJfN
pMFvbg/iK+ByhWq8iAOkT7OP64wi++FlOFa39IAiQ1QPRD0j93OlKMp0LjqEEiKd
Gw8o3X03GWhqoJUlSz40TF0Pvkje1UTk2Y8k2y24I3AnnEAcO5x+5pZYUTOe6x5N
THqqSMsdKWIibrQJRuOXll/DkS8zcepTHU7o8hyHBKYh7LxdAs4ITQoYZjcU5lse
HGwldByKfuNlzF3+96Jh9wZsr/9zjD8yovEcQYk37s56T/b7kT0sQm6XGS1dFE8Q
xQgcXLEUXZLt/79B0bn/5ogh26xswx/3GHgNjL1tJQc/MhbQ6C0bb2bBVoU21qzq
I5yMMwNSkH8+7+PGPiaQ
=YDHs
-----END PGP SIGNATURE-----
Merge tag 'fixes-for-linus2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC fixes from Olof Johansson:
"Here's a long-pending fixes pull request for arm-soc (I didn't send
one in the -rc4 cycle).
The larger deltas are from:
- A fixup of error paths in the mvsdio driver
- Header file move for a driver that hadn't been properly converted
to multiplatform on i.MX, which was causing build failures when
included
- Device tree updates for at91 dealing mostly with their new pinctrl
setup merged in 3.8 and mistakes in those initial configs
The rest are the normal mix of small fixes all over the place; sunxi,
omap, imx, mvebu, etc, etc."
* tag 'fixes-for-linus2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (40 commits)
mfd: vexpress-sysreg: Don't skip initialization on probe
ARM: vexpress: Enable A7 cores in V2P-CA15_A7's Device Tree
ARM: vexpress: extend the MPIDR range used for pen release check
ARM: at91/dts: correct comment in at91sam9x5.dtsi for mii
ARM: at91/at91_dt_defconfig: add at91sam9n12 SoC to DT defconfig
ARM: at91/at91_dt_defconfig: remove memory specification to cmdline
ARM: at91/dts: add macb mii pinctrl config for kizbox
ARM: at91: rm9200: remake the BGA as default version
ARM: at91: fix gpios on i2c-gpio for RM9200 DT
ARM: at91/at91sam9x5 DTS: add SCK USART pins
ARM: at91/at91sam9x5 DTS: correct wrong PIO BANK values on u(s)arts
ARM: at91/at91-pinctrl documentation: fix typo and add some details
ARM: kirkwood: fix missing #interrupt-cells property
mmc: mvsdio: use devm_ API to simplify/correct error paths.
clk: mvebu/clk-cpu.c: fix memory leakage
ARM: OMAP2+: omap4-panda: add UART2 muxing for WiLink shared transport
ARM: OMAP2+: DT node Timer iteration fix
ARM: OMAP2+: Fix section warning for omap_init_ocp2scp()
ARM: OMAP2+: fix build break for omapdrm
ARM: OMAP2: Fix missing omap2xxx_clkt_vps_late_init function calls
...