9127d54bb8
Add RZ/G1E (R8A7745) Clock Pulse Generator / Module Standby and Software Reset support, using the CPG/MSSR driver core and the common R-Car Gen2 (and RZ/G) code. Based on the proof-of-concept R8A7791 CPG/MSSR patch by Geert Uytterhoeven <geert+renesas@glider.be>. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
19 lines
1,010 B
Makefile
19 lines
1,010 B
Makefile
obj-$(CONFIG_ARCH_EMEV2) += clk-emev2.o
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obj-$(CONFIG_ARCH_R7S72100) += clk-rz.o
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obj-$(CONFIG_ARCH_R8A73A4) += clk-r8a73a4.o clk-div6.o
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obj-$(CONFIG_ARCH_R8A7740) += clk-r8a7740.o clk-div6.o
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obj-$(CONFIG_ARCH_R8A7743) += r8a7743-cpg-mssr.o rcar-gen2-cpg.o
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obj-$(CONFIG_ARCH_R8A7745) += r8a7745-cpg-mssr.o rcar-gen2-cpg.o
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obj-$(CONFIG_ARCH_R8A7778) += clk-r8a7778.o
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obj-$(CONFIG_ARCH_R8A7779) += clk-r8a7779.o
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obj-$(CONFIG_ARCH_R8A7790) += clk-rcar-gen2.o clk-div6.o
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obj-$(CONFIG_ARCH_R8A7791) += clk-rcar-gen2.o clk-div6.o
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obj-$(CONFIG_ARCH_R8A7792) += clk-rcar-gen2.o clk-div6.o
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obj-$(CONFIG_ARCH_R8A7793) += clk-rcar-gen2.o clk-div6.o
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obj-$(CONFIG_ARCH_R8A7794) += clk-rcar-gen2.o clk-div6.o
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obj-$(CONFIG_ARCH_R8A7795) += r8a7795-cpg-mssr.o rcar-gen3-cpg.o
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obj-$(CONFIG_ARCH_R8A7796) += r8a7796-cpg-mssr.o rcar-gen3-cpg.o
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obj-$(CONFIG_ARCH_SH73A0) += clk-sh73a0.o clk-div6.o
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obj-$(CONFIG_CLK_RENESAS_CPG_MSSR) += renesas-cpg-mssr.o clk-div6.o
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obj-$(CONFIG_CLK_RENESAS_CPG_MSTP) += clk-mstp.o
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