04bc7d96fb
Exynos4210 and Exynos4x12 SoCs have the PL330 MDMA IP block clock defined exactly in same way in documentation. Using different names for these clocks is a bit misleading. Since there is no users of CLK_MDMA2 in existing dts files this patch drops CLK_MDMA2 and replaces it with CLK_MDMA in the driver. This ensures PL330 MDMA has correct clock assigned on Exynos4x12 SoCs. Suggested-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Acked-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Tomasz Figa <t.figa@samsung.com> |
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clk-exynos-audss.c | ||
clk-exynos4.c | ||
clk-exynos5250.c | ||
clk-exynos5260.c | ||
clk-exynos5260.h | ||
clk-exynos5420.c | ||
clk-exynos5440.c | ||
clk-pll.c | ||
clk-pll.h | ||
clk-s3c64xx.c | ||
clk-s3c2410-dclk.c | ||
clk-s3c2410.c | ||
clk-s3c2412.c | ||
clk-s3c2443.c | ||
clk.c | ||
clk.h | ||
Makefile |