Ville Syrjälä 1f3dc3e334 drm/i915: Initialize dev_priv->atomic_cdclk_freq at init time ... Looks like we're only initializing dev_priv->atomic_cdclk_freq at resume and commit times, not at init time. Let's do that as well. We're now hitting the 'WARN_ON(intel_state->cdclk == 0)' in hsw_compute_linetime_wm() on account of populating intel_state->cdclk from dev_priv->atomic_cdclk_freq. Previously we were mispopulating intel_state->cdclk with dev_priv->cdclk_freq which always had a proper value at init time and hence the WARN_ON() didn't trigger. Cc: <stable@vger.kernel.org> # 4.6+: 14676ec6b1 drm/i915: Fix cdclk vs. dev_cdclk mess when not recomputing things Cc: <stable@vger.kernel.org> # 4.6+ Cc: Matthew Auld <matthew.auld@intel.com> Reported-by: Matthew Auld <matthew.auld@intel.com> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98902 Fixes: 14676ec6b1 ("drm/i915: Fix cdclk vs. dev_cdclk mess when not recomputing things") Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1480428837-4207-1-git-send-email-ville.syrjala@linux.intel.com Tested-by: Matthew Auld <matthew.auld@intel.com> Reviewed-by: Matthew Auld <matthew.auld@intel.com> (cherry picked from commit 6a259b1f8a) Signed-off-by: Jani Nikula <jani.nikula@intel.com>		2016-12-05 10:58:31 +02:00
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drm	drm/i915: Initialize dev_priv->atomic_cdclk_freq at init time	2016-12-05 10:58:31 +02:00
host1x	drm/tegra: dsi: Enhance runtime power management	2016-08-24 15:58:57 +02:00
ipu-v3	imx-drm plane update cleanup, YUV formats	2016-11-11 09:31:27 +10:00
vga	drivers/gpu/vga: allocate vga_arb_write() buffer on stack	2016-10-17 08:21:14 +02:00
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