52585ccd93
Since there're mulitple clock rates in some device controllers, enable clk_set_rate() for this usage. Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
105 lines
2 KiB
C
105 lines
2 KiB
C
/*
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* linux/arch/arm/mach-mmp/clock.c
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/list.h>
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#include <linux/spinlock.h>
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#include <linux/clk.h>
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#include <linux/io.h>
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#include <mach/regs-apbc.h>
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#include "clock.h"
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static void apbc_clk_enable(struct clk *clk)
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{
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uint32_t clk_rst;
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clk_rst = APBC_APBCLK | APBC_FNCLK | APBC_FNCLKSEL(clk->fnclksel);
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__raw_writel(clk_rst, clk->clk_rst);
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}
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static void apbc_clk_disable(struct clk *clk)
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{
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__raw_writel(0, clk->clk_rst);
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}
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struct clkops apbc_clk_ops = {
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.enable = apbc_clk_enable,
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.disable = apbc_clk_disable,
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};
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static void apmu_clk_enable(struct clk *clk)
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{
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__raw_writel(clk->enable_val, clk->clk_rst);
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}
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static void apmu_clk_disable(struct clk *clk)
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{
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__raw_writel(0, clk->clk_rst);
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}
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struct clkops apmu_clk_ops = {
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.enable = apmu_clk_enable,
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.disable = apmu_clk_disable,
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};
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static DEFINE_SPINLOCK(clocks_lock);
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int clk_enable(struct clk *clk)
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{
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unsigned long flags;
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spin_lock_irqsave(&clocks_lock, flags);
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if (clk->enabled++ == 0)
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clk->ops->enable(clk);
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spin_unlock_irqrestore(&clocks_lock, flags);
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return 0;
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}
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EXPORT_SYMBOL(clk_enable);
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void clk_disable(struct clk *clk)
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{
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unsigned long flags;
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WARN_ON(clk->enabled == 0);
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spin_lock_irqsave(&clocks_lock, flags);
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if (--clk->enabled == 0)
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clk->ops->disable(clk);
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spin_unlock_irqrestore(&clocks_lock, flags);
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}
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EXPORT_SYMBOL(clk_disable);
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unsigned long clk_get_rate(struct clk *clk)
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{
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unsigned long rate;
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if (clk->ops->getrate)
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rate = clk->ops->getrate(clk);
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else
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rate = clk->rate;
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return rate;
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}
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EXPORT_SYMBOL(clk_get_rate);
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int clk_set_rate(struct clk *clk, unsigned long rate)
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{
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unsigned long flags;
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int ret = -EINVAL;
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if (clk->ops->setrate) {
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spin_lock_irqsave(&clocks_lock, flags);
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ret = clk->ops->setrate(clk, rate);
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spin_unlock_irqrestore(&clocks_lock, flags);
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}
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return ret;
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}
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EXPORT_SYMBOL(clk_set_rate);
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