Paulo Zanoni 3e1f72664e drm/i915: MCH_SSKPD is a 64 bit register on Haswell ... And the SNB_READ_WM0_LATENCY macro is not valid anymore because we have the "New WM0" at 63:56, so the "Old WM0" could maybe be zero if the new one is not zero. Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>		2013-05-21 12:00:26 +02:00
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drm	drm/i915: MCH_SSKPD is a 64 bit register on Haswell	2013-05-21 12:00:26 +02:00
host1x	drivers/gpu/host1x/drm: don't check resource with devm_ioremap_resource	2013-05-18 11:55:30 +02:00
vga	fbcon: fix locking harder	2013-02-08 12:02:43 +10:00
Makefile	gpu: host1x: Add host1x driver	2013-04-22 12:32:40 +02:00