07983f0e36
Update several Documentation/ files and a few sub-dir files (only one change in each) to reflect changed header files locations. Signed-off-by: Randy Dunlap <randy.dunlap@oracle.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
56 lines
2.6 KiB
Text
56 lines
2.6 KiB
Text
Hollis Blanchard <hollis@austin.ibm.com>
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5 Jun 2002
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This document describes the system (including self-modifying code) used in the
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PPC Linux kernel to support a variety of PowerPC CPUs without requiring
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compile-time selection.
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Early in the boot process the ppc32 kernel detects the current CPU type and
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chooses a set of features accordingly. Some examples include Altivec support,
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split instruction and data caches, and if the CPU supports the DOZE and NAP
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sleep modes.
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Detection of the feature set is simple. A list of processors can be found in
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arch/ppc/kernel/cputable.c. The PVR register is masked and compared with each
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value in the list. If a match is found, the cpu_features of cur_cpu_spec is
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assigned to the feature bitmask for this processor and a __setup_cpu function
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is called.
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C code may test 'cur_cpu_spec[smp_processor_id()]->cpu_features' for a
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particular feature bit. This is done in quite a few places, for example
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in ppc_setup_l2cr().
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Implementing cpufeatures in assembly is a little more involved. There are
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several paths that are performance-critical and would suffer if an array
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index, structure dereference, and conditional branch were added. To avoid the
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performance penalty but still allow for runtime (rather than compile-time) CPU
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selection, unused code is replaced by 'nop' instructions. This nop'ing is
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based on CPU 0's capabilities, so a multi-processor system with non-identical
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processors will not work (but such a system would likely have other problems
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anyways).
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After detecting the processor type, the kernel patches out sections of code
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that shouldn't be used by writing nop's over it. Using cpufeatures requires
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just 2 macros (found in arch/powerpc/include/asm/cputable.h), as seen in head.S
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transfer_to_handler:
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#ifdef CONFIG_ALTIVEC
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BEGIN_FTR_SECTION
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mfspr r22,SPRN_VRSAVE /* if G4, save vrsave register value */
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stw r22,THREAD_VRSAVE(r23)
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END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
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#endif /* CONFIG_ALTIVEC */
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If CPU 0 supports Altivec, the code is left untouched. If it doesn't, both
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instructions are replaced with nop's.
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The END_FTR_SECTION macro has two simpler variations: END_FTR_SECTION_IFSET
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and END_FTR_SECTION_IFCLR. These simply test if a flag is set (in
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cur_cpu_spec[0]->cpu_features) or is cleared, respectively. These two macros
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should be used in the majority of cases.
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The END_FTR_SECTION macros are implemented by storing information about this
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code in the '__ftr_fixup' ELF section. When do_cpu_ftr_fixups
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(arch/ppc/kernel/misc.S) is invoked, it will iterate over the records in
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__ftr_fixup, and if the required feature is not present it will loop writing
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nop's from each BEGIN_FTR_SECTION to END_FTR_SECTION.
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