439bf39e76
Describe minimal DT boot machine details for DRA7xx based SoC's. DRA7xx family is based on dual core ARM CORTEX A15 using GIC as the interrupt controller. The PRCM and timer infrastructure is reused from OMAP5 and so are the io descriptor tables. Signed-off-by: R Sricharan <r.sricharan@ti.com> Signed-off-by: Rajendra Nayak <rnayak@ti.com>
242 lines
6.2 KiB
C
242 lines
6.2 KiB
C
/*
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* Copyright (C) 2005 Nokia Corporation
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* Author: Paul Mundt <paul.mundt@nokia.com>
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*
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* Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
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*
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* Modified from the original mach-omap/omap2/board-generic.c did by Paul
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* to support the OMAP2+ device tree boards with an unique board file.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/io.h>
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#include <linux/of_irq.h>
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#include <linux/of_platform.h>
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#include <linux/irqdomain.h>
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#include <linux/clk.h>
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#include <asm/mach/arch.h>
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#include "common.h"
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#include "common-board-devices.h"
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#include "dss-common.h"
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#if !(defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3))
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#define intc_of_init NULL
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#endif
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#ifndef CONFIG_ARCH_OMAP4
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#define gic_of_init NULL
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#endif
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static struct of_device_id omap_dt_match_table[] __initdata = {
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{ .compatible = "simple-bus", },
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{ .compatible = "ti,omap-infra", },
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{ }
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};
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/*
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* Create alias for USB host PHY clock.
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* Remove this when clock phandle can be provided via DT
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*/
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static void __init legacy_init_ehci_clk(char *clkname)
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{
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int ret;
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ret = clk_add_alias("main_clk", NULL, clkname, NULL);
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if (ret) {
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pr_err("%s:Failed to add main_clk alias to %s :%d\n",
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__func__, clkname, ret);
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}
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}
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static void __init omap_generic_init(void)
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{
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omap_sdrc_init(NULL, NULL);
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of_platform_populate(NULL, omap_dt_match_table, NULL, NULL);
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/*
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* HACK: call display setup code for selected boards to enable omapdss.
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* This will be removed when omapdss supports DT.
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*/
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if (of_machine_is_compatible("ti,omap4-panda")) {
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omap4_panda_display_init_of();
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legacy_init_ehci_clk("auxclk3_ck");
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}
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else if (of_machine_is_compatible("ti,omap4-sdp"))
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omap_4430sdp_display_init_of();
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else if (of_machine_is_compatible("ti,omap5-uevm"))
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legacy_init_ehci_clk("auxclk1_ck");
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}
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#ifdef CONFIG_SOC_OMAP2420
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static const char *omap242x_boards_compat[] __initdata = {
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"ti,omap2420",
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NULL,
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};
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DT_MACHINE_START(OMAP242X_DT, "Generic OMAP2420 (Flattened Device Tree)")
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.reserve = omap_reserve,
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.map_io = omap242x_map_io,
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.init_early = omap2420_init_early,
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.init_irq = omap_intc_of_init,
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.handle_irq = omap2_intc_handle_irq,
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.init_machine = omap_generic_init,
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.init_time = omap2_sync32k_timer_init,
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.dt_compat = omap242x_boards_compat,
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.restart = omap2xxx_restart,
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MACHINE_END
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#endif
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#ifdef CONFIG_SOC_OMAP2430
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static const char *omap243x_boards_compat[] __initdata = {
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"ti,omap2430",
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NULL,
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};
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DT_MACHINE_START(OMAP243X_DT, "Generic OMAP2430 (Flattened Device Tree)")
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.reserve = omap_reserve,
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.map_io = omap243x_map_io,
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.init_early = omap2430_init_early,
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.init_irq = omap_intc_of_init,
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.handle_irq = omap2_intc_handle_irq,
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.init_machine = omap_generic_init,
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.init_time = omap2_sync32k_timer_init,
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.dt_compat = omap243x_boards_compat,
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.restart = omap2xxx_restart,
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MACHINE_END
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#endif
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#ifdef CONFIG_ARCH_OMAP3
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static const char *omap3_boards_compat[] __initdata = {
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"ti,omap3",
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NULL,
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};
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DT_MACHINE_START(OMAP3_DT, "Generic OMAP3 (Flattened Device Tree)")
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.reserve = omap_reserve,
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.map_io = omap3_map_io,
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.init_early = omap3430_init_early,
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.init_irq = omap_intc_of_init,
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.handle_irq = omap3_intc_handle_irq,
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.init_machine = omap_generic_init,
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.init_late = omap3_init_late,
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.init_time = omap3_sync32k_timer_init,
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.dt_compat = omap3_boards_compat,
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.restart = omap3xxx_restart,
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MACHINE_END
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static const char *omap3_gp_boards_compat[] __initdata = {
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"ti,omap3-beagle",
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"timll,omap3-devkit8000",
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NULL,
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};
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DT_MACHINE_START(OMAP3_GP_DT, "Generic OMAP3-GP (Flattened Device Tree)")
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.reserve = omap_reserve,
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.map_io = omap3_map_io,
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.init_early = omap3430_init_early,
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.init_irq = omap_intc_of_init,
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.handle_irq = omap3_intc_handle_irq,
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.init_machine = omap_generic_init,
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.init_late = omap3_init_late,
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.init_time = omap3_secure_sync32k_timer_init,
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.dt_compat = omap3_gp_boards_compat,
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.restart = omap3xxx_restart,
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MACHINE_END
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#endif
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#ifdef CONFIG_SOC_AM33XX
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static const char *am33xx_boards_compat[] __initdata = {
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"ti,am33xx",
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NULL,
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};
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DT_MACHINE_START(AM33XX_DT, "Generic AM33XX (Flattened Device Tree)")
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.reserve = omap_reserve,
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.map_io = am33xx_map_io,
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.init_early = am33xx_init_early,
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.init_irq = omap_intc_of_init,
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.handle_irq = omap3_intc_handle_irq,
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.init_machine = omap_generic_init,
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.init_time = omap3_gptimer_timer_init,
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.dt_compat = am33xx_boards_compat,
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.restart = am33xx_restart,
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MACHINE_END
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#endif
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#ifdef CONFIG_ARCH_OMAP4
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static const char *omap4_boards_compat[] __initdata = {
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"ti,omap4",
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NULL,
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};
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DT_MACHINE_START(OMAP4_DT, "Generic OMAP4 (Flattened Device Tree)")
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.reserve = omap_reserve,
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.smp = smp_ops(omap4_smp_ops),
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.map_io = omap4_map_io,
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.init_early = omap4430_init_early,
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.init_irq = omap_gic_of_init,
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.init_machine = omap_generic_init,
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.init_late = omap4430_init_late,
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.init_time = omap4_local_timer_init,
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.dt_compat = omap4_boards_compat,
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.restart = omap44xx_restart,
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MACHINE_END
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#endif
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#ifdef CONFIG_SOC_OMAP5
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static const char *omap5_boards_compat[] __initdata = {
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"ti,omap5",
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NULL,
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};
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DT_MACHINE_START(OMAP5_DT, "Generic OMAP5 (Flattened Device Tree)")
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.reserve = omap_reserve,
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.smp = smp_ops(omap4_smp_ops),
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.map_io = omap5_map_io,
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.init_early = omap5_init_early,
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.init_irq = omap_gic_of_init,
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.init_machine = omap_generic_init,
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.init_time = omap5_realtime_timer_init,
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.dt_compat = omap5_boards_compat,
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.restart = omap44xx_restart,
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MACHINE_END
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#endif
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#ifdef CONFIG_SOC_AM43XX
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static const char *am43_boards_compat[] __initdata = {
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"ti,am43",
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NULL,
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};
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DT_MACHINE_START(AM43_DT, "Generic AM43 (Flattened Device Tree)")
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.map_io = am33xx_map_io,
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.init_early = am43xx_init_early,
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.init_irq = omap_gic_of_init,
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.init_machine = omap_generic_init,
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.init_time = omap3_sync32k_timer_init,
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.dt_compat = am43_boards_compat,
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MACHINE_END
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#endif
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#ifdef CONFIG_SOC_DRA7XX
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static const char *dra7xx_boards_compat[] __initdata = {
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"ti,dra7",
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NULL,
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};
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DT_MACHINE_START(DRA7XX_DT, "Generic DRA7XX (Flattened Device Tree)")
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.reserve = omap_reserve,
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.smp = smp_ops(omap4_smp_ops),
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.map_io = omap5_map_io,
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.init_early = dra7xx_init_early,
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.init_irq = omap_gic_of_init,
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.init_machine = omap_generic_init,
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.init_time = omap5_realtime_timer_init,
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.dt_compat = dra7xx_boards_compat,
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MACHINE_END
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#endif
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