7dafbab375
Improve code readablity by adding inline functions to read specific BTH/IB fields without knowledge of byte offsets. Reviewed-by: Brian Welty <brian.welty@intel.com> Reviewed-by: Dasaratharaman Chandramouli <dasaratharaman.chandramouli@intel.com> Reviewed-by: Dennis Dalessandro <dennis.dalessandro@intel.com> Signed-off-by: Don Hiatt <don.hiatt@intel.com> Signed-off-by: Dennis Dalessandro <dennis.dalessandro@intel.com> Signed-off-by: Doug Ledford <dledford@redhat.com>
334 lines
8.4 KiB
C
334 lines
8.4 KiB
C
/*
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* Copyright(c) 2016 Intel Corporation.
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*
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* This file is provided under a dual BSD/GPLv2 license. When using or
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* redistributing this file, you may do so under either license.
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*
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* GPL LICENSE SUMMARY
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* BSD LICENSE
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* - Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* - Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* - Neither the name of Intel Corporation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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*/
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#ifndef IB_HDRS_H
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#define IB_HDRS_H
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#include <linux/types.h>
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#include <asm/unaligned.h>
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#include <rdma/ib_verbs.h>
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#define IB_SEQ_NAK (3 << 29)
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/* AETH NAK opcode values */
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#define IB_RNR_NAK 0x20
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#define IB_NAK_PSN_ERROR 0x60
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#define IB_NAK_INVALID_REQUEST 0x61
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#define IB_NAK_REMOTE_ACCESS_ERROR 0x62
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#define IB_NAK_REMOTE_OPERATIONAL_ERROR 0x63
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#define IB_NAK_INVALID_RD_REQUEST 0x64
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#define IB_BTH_REQ_ACK BIT(31)
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#define IB_BTH_SOLICITED BIT(23)
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#define IB_BTH_MIG_REQ BIT(22)
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#define IB_GRH_VERSION 6
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#define IB_GRH_VERSION_MASK 0xF
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#define IB_GRH_VERSION_SHIFT 28
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#define IB_GRH_TCLASS_MASK 0xFF
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#define IB_GRH_TCLASS_SHIFT 20
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#define IB_GRH_FLOW_MASK 0xFFFFF
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#define IB_GRH_FLOW_SHIFT 0
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#define IB_GRH_NEXT_HDR 0x1B
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#define IB_FECN_SHIFT 31
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#define IB_FECN_MASK 1
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#define IB_FECN_SMASK BIT(IB_FECN_SHIFT)
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#define IB_BECN_SHIFT 30
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#define IB_BECN_MASK 1
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#define IB_BECN_SMASK BIT(IB_BECN_SHIFT)
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#define IB_AETH_CREDIT_SHIFT 24
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#define IB_AETH_CREDIT_MASK 0x1F
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#define IB_AETH_CREDIT_INVAL 0x1F
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#define IB_AETH_NAK_SHIFT 29
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#define IB_MSN_MASK 0xFFFFFF
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struct ib_reth {
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__be64 vaddr; /* potentially unaligned */
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__be32 rkey;
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__be32 length;
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} __packed;
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struct ib_atomic_eth {
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__be64 vaddr; /* potentially unaligned */
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__be32 rkey;
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__be64 swap_data; /* potentially unaligned */
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__be64 compare_data; /* potentially unaligned */
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} __packed;
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union ib_ehdrs {
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struct {
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__be32 deth[2];
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__be32 imm_data;
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} ud;
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struct {
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struct ib_reth reth;
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__be32 imm_data;
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} rc;
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struct {
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__be32 aeth;
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__be64 atomic_ack_eth; /* potentially unaligned */
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} __packed at;
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__be32 imm_data;
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__be32 aeth;
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__be32 ieth;
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struct ib_atomic_eth atomic_eth;
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} __packed;
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struct ib_other_headers {
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__be32 bth[3];
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union ib_ehdrs u;
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} __packed;
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struct ib_header {
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__be16 lrh[4];
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union {
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struct {
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struct ib_grh grh;
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struct ib_other_headers oth;
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} l;
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struct ib_other_headers oth;
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} u;
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} __packed;
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/* accessors for unaligned __be64 items */
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static inline u64 ib_u64_get(__be64 *p)
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{
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return get_unaligned_be64(p);
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}
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static inline void ib_u64_put(u64 val, __be64 *p)
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{
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put_unaligned_be64(val, p);
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}
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static inline u64 get_ib_reth_vaddr(struct ib_reth *reth)
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{
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return ib_u64_get(&reth->vaddr);
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}
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static inline void put_ib_reth_vaddr(u64 val, struct ib_reth *reth)
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{
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ib_u64_put(val, &reth->vaddr);
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}
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static inline u64 get_ib_ateth_vaddr(struct ib_atomic_eth *ateth)
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{
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return ib_u64_get(&ateth->vaddr);
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}
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static inline void put_ib_ateth_vaddr(u64 val, struct ib_atomic_eth *ateth)
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{
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ib_u64_put(val, &ateth->vaddr);
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}
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static inline u64 get_ib_ateth_swap(struct ib_atomic_eth *ateth)
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{
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return ib_u64_get(&ateth->swap_data);
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}
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static inline void put_ib_ateth_swap(u64 val, struct ib_atomic_eth *ateth)
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{
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ib_u64_put(val, &ateth->swap_data);
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}
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static inline u64 get_ib_ateth_compare(struct ib_atomic_eth *ateth)
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{
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return ib_u64_get(&ateth->compare_data);
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}
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static inline void put_ib_ateth_compare(u64 val, struct ib_atomic_eth *ateth)
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{
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ib_u64_put(val, &ateth->compare_data);
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}
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/*
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* 9B/IB Packet Format
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*/
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#define IB_LNH_MASK 3
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#define IB_SC_MASK 0xf
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#define IB_SC_SHIFT 12
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#define IB_SC5_MASK 0x10
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#define IB_SL_MASK 0xf
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#define IB_SL_SHIFT 4
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#define IB_SL_SHIFT 4
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#define IB_LVER_MASK 0xf
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#define IB_LVER_SHIFT 8
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static inline u8 ib_get_lnh(struct ib_header *hdr)
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{
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return (be16_to_cpu(hdr->lrh[0]) & IB_LNH_MASK);
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}
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static inline u8 ib_get_sc(struct ib_header *hdr)
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{
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return ((be16_to_cpu(hdr->lrh[0]) >> IB_SC_SHIFT) & IB_SC_MASK);
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}
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static inline bool ib_is_sc5(u16 sc5)
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{
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return !!(sc5 & IB_SC5_MASK);
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}
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static inline u8 ib_get_sl(struct ib_header *hdr)
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{
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return ((be16_to_cpu(hdr->lrh[0]) >> IB_SL_SHIFT) & IB_SL_MASK);
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}
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static inline u16 ib_get_dlid(struct ib_header *hdr)
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{
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return (be16_to_cpu(hdr->lrh[1]));
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}
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static inline u16 ib_get_slid(struct ib_header *hdr)
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{
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return (be16_to_cpu(hdr->lrh[3]));
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}
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static inline u8 ib_get_lver(struct ib_header *hdr)
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{
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return (u8)((be16_to_cpu(hdr->lrh[0]) >> IB_LVER_SHIFT) &
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IB_LVER_MASK);
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}
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static inline u16 ib_get_len(struct ib_header *hdr)
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{
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return (u16)(be16_to_cpu(hdr->lrh[2]));
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}
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static inline u32 ib_get_qkey(struct ib_other_headers *ohdr)
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{
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return be32_to_cpu(ohdr->u.ud.deth[0]);
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}
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static inline u32 ib_get_sqpn(struct ib_other_headers *ohdr)
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{
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return ((be32_to_cpu(ohdr->u.ud.deth[1])) & IB_QPN_MASK);
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}
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/*
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* BTH
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*/
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#define IB_BTH_OPCODE_MASK 0xff
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#define IB_BTH_OPCODE_SHIFT 24
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#define IB_BTH_PAD_MASK 3
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#define IB_BTH_PKEY_MASK 0xffff
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#define IB_BTH_PAD_SHIFT 20
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#define IB_BTH_A_MASK 1
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#define IB_BTH_A_SHIFT 31
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#define IB_BTH_M_MASK 1
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#define IB_BTH_M_SHIFT 22
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#define IB_BTH_SE_MASK 1
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#define IB_BTH_SE_SHIFT 23
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#define IB_BTH_TVER_MASK 0xf
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#define IB_BTH_TVER_SHIFT 16
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static inline u8 ib_bth_get_pad(struct ib_other_headers *ohdr)
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{
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return ((be32_to_cpu(ohdr->bth[0]) >> IB_BTH_PAD_SHIFT) &
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IB_BTH_PAD_MASK);
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}
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static inline u16 ib_bth_get_pkey(struct ib_other_headers *ohdr)
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{
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return (be32_to_cpu(ohdr->bth[0]) & IB_BTH_PKEY_MASK);
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}
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static inline u8 ib_bth_get_opcode(struct ib_other_headers *ohdr)
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{
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return ((be32_to_cpu(ohdr->bth[0]) >> IB_BTH_OPCODE_SHIFT) &
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IB_BTH_OPCODE_MASK);
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}
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static inline u8 ib_bth_get_ackreq(struct ib_other_headers *ohdr)
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{
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return (u8)((be32_to_cpu(ohdr->bth[2]) >> IB_BTH_A_SHIFT) &
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IB_BTH_A_MASK);
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}
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static inline u8 ib_bth_get_migreq(struct ib_other_headers *ohdr)
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{
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return (u8)((be32_to_cpu(ohdr->bth[0]) >> IB_BTH_M_SHIFT) &
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IB_BTH_M_MASK);
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}
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static inline u8 ib_bth_get_se(struct ib_other_headers *ohdr)
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{
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return (u8)((be32_to_cpu(ohdr->bth[0]) >> IB_BTH_SE_SHIFT) &
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IB_BTH_SE_MASK);
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}
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static inline u32 ib_bth_get_psn(struct ib_other_headers *ohdr)
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{
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return (u32)(be32_to_cpu(ohdr->bth[2]));
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}
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static inline u32 ib_bth_get_qpn(struct ib_other_headers *ohdr)
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{
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return (u32)((be32_to_cpu(ohdr->bth[1])) & IB_QPN_MASK);
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}
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static inline u8 ib_bth_get_becn(struct ib_other_headers *ohdr)
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{
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return (u8)((be32_to_cpu(ohdr->bth[1]) >> IB_BECN_SHIFT) &
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IB_BECN_MASK);
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}
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static inline u8 ib_bth_get_fecn(struct ib_other_headers *ohdr)
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{
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return (u8)((be32_to_cpu(ohdr->bth[1]) >> IB_FECN_SHIFT) &
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IB_FECN_MASK);
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}
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static inline u8 ib_bth_get_tver(struct ib_other_headers *ohdr)
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{
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return (u8)((be32_to_cpu(ohdr->bth[0]) >> IB_BTH_TVER_SHIFT) &
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IB_BTH_TVER_MASK);
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}
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#endif /* IB_HDRS_H */
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