linux-hardened/arch/mips/lantiq/xway
Hauke Mehrtens 98e58b01e1 MIPS: Lantiq: Lock DMA register accesses for SMP
The DMA controller channel and port configuration is changed by
selecting the port or channel in one register and then update the
configuration in other registers. This has to be done in an atomic
operation. Previously only the local interrupts were deactivated which
works for single CPU systems. If the system supports SMP a better
locking is needed, use spinlocks instead.
On more recent SoCs (at least xrx200 and later) there are two memory
regions to change the configuration, there we could use one area for
each CPU and do not have to synchronize between the CPUs and more.

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Cc: john@phrozen.org
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/14912/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2017-01-25 02:51:12 +01:00
..
clk.c MIPS: Change my email address 2016-05-13 14:02:18 +02:00
dcdc.c MIPS: Change my email address 2016-05-13 14:02:18 +02:00
dma.c MIPS: Lantiq: Lock DMA register accesses for SMP 2017-01-25 02:51:12 +01:00
gptu.c MIPS: Change my email address 2016-05-13 14:02:18 +02:00
Makefile MIPS: lantiq: handle vmmc memory reservation 2014-11-24 07:45:17 +01:00
prom.c MIPS: Change my email address 2016-05-13 14:02:18 +02:00
reset.c MIPS: Change my email address 2016-05-13 14:02:18 +02:00
sysctrl.c MIPS: Lantiq: Fix another request_mem_region() return code check 2017-01-25 02:51:10 +01:00
vmmc.c MIPS: Lantiq: Make vmmc explicitly non-modular 2016-10-04 16:13:57 +02:00
xrx200_phy_fw.c MIPS: Lantiq: Make xrx200_phy_fw explicitly non-modular 2016-10-04 16:13:57 +02:00