61fbb1d278
The three SoCs share a common clock tree which only differs in the existence of some special clocks. As with all parts common to these three SoCs the driver is named after the s3c2443, as it was the first SoC introducing this structure and there exists no other label to describe this s3c24xx epoch. The clock structure is built according to the manuals of the included SoCs and might include changes in comparison to the previous clock structure. As an example the sclk_uart gate was never handled previously and the div_uart was made to be the clock used by the serial driver. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com> |
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| .. | ||
| clk | ||
| clock | ||
| dma | ||
| gpio | ||
| input | ||
| interrupt-controller | ||
| mfd | ||
| pinctrl | ||
| pwm | ||
| reset | ||
| reset-controller | ||
| sound | ||
| spmi | ||
| thermal | ||