466eed22d1
Rather than remove and/or mangle inb_p/outb_p we want to remove the use of them from inappropriate places. For the PIC/PIT this may eventually depend on 32/64bitism or similar so start by adding inb/outb_pit and inb/outb_pic so that we can make them use any scheme we settle on without disturbing the existing, correct (for ISA), port 0x80 usage. (eg we can make inb_pit use udelay without messing up inb_p). Floppy already does this for the fdc. That really only leaves the CMOS as a core logic item to tackle, and bits of parallel port handling in the chipset layers. Signed-off-by: Alan Cox <alan@redhat.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
35 lines
961 B
C
35 lines
961 B
C
#ifndef __ASM_I8259_H__
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#define __ASM_I8259_H__
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extern unsigned int cached_irq_mask;
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#define __byte(x,y) (((unsigned char *) &(y))[x])
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#define cached_master_mask (__byte(0, cached_irq_mask))
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#define cached_slave_mask (__byte(1, cached_irq_mask))
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/* i8259A PIC registers */
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#define PIC_MASTER_CMD 0x20
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#define PIC_MASTER_IMR 0x21
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#define PIC_MASTER_ISR PIC_MASTER_CMD
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#define PIC_MASTER_POLL PIC_MASTER_ISR
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#define PIC_MASTER_OCW3 PIC_MASTER_ISR
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#define PIC_SLAVE_CMD 0xa0
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#define PIC_SLAVE_IMR 0xa1
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/* i8259A PIC related value */
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#define PIC_CASCADE_IR 2
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#define MASTER_ICW4_DEFAULT 0x01
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#define SLAVE_ICW4_DEFAULT 0x01
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#define PIC_ICW4_AEOI 2
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extern spinlock_t i8259A_lock;
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extern void init_8259A(int auto_eoi);
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extern void enable_8259A_irq(unsigned int irq);
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extern void disable_8259A_irq(unsigned int irq);
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extern unsigned int startup_8259A_irq(unsigned int irq);
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#define inb_pic inb_p
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#define outb_pic outb_p
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#endif /* __ASM_I8259_H__ */
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