7716e6548a
Octeon uses different interrupt irq for timer and performance counters. Set CvmCtl[IPPCI] to correct irq value very early. Signed-off-by: Chandrakala Chavva <cchavva@caviumnetworks.com> Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org Cc: Chandrakala Chavva <cchavva@caviumnetworks.com> Patchwork: https://patchwork.linux-mips.org/patch/2085/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org> |
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.. | ||
executive | ||
cpu.c | ||
csrc-octeon.c | ||
dma-octeon.c | ||
flash_setup.c | ||
Kconfig | ||
Makefile | ||
octeon-irq.c | ||
octeon-memcpy.S | ||
octeon-platform.c | ||
octeon_boot.h | ||
Platform | ||
serial.c | ||
setup.c | ||
smp.c |