030f4e9687
This patch fixes a host of reentrancy bugs in the nx driver. The following algorithms are affected: * CCM * GCM * CTR * XCBC * SHA256 * SHA512 The crypto API allows a single transform to be used by multiple threads simultaneously. For example, IPsec will use a single tfm to process packets for a given SA. As packets may arrive on multiple CPUs that tfm must be reentrant. The nx driver does try to deal with this by using a spin lock. Unfortunately only the basic AES/CBC/ECB algorithms do this in the correct way. The symptom of these bugs may range from the generation of incorrect output to memory corruption. Cc: stable@vger.kernel.org Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
188 lines
5.2 KiB
C
188 lines
5.2 KiB
C
/**
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* AES CTR routines supporting the Power 7+ Nest Accelerators driver
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*
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* Copyright (C) 2011-2012 International Business Machines Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 only.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*
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* Author: Kent Yoder <yoder1@us.ibm.com>
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*/
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#include <crypto/aes.h>
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#include <crypto/ctr.h>
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#include <crypto/algapi.h>
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#include <linux/module.h>
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#include <linux/types.h>
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#include <linux/crypto.h>
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#include <asm/vio.h>
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#include "nx_csbcpb.h"
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#include "nx.h"
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static int ctr_aes_nx_set_key(struct crypto_tfm *tfm,
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const u8 *in_key,
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unsigned int key_len)
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{
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struct nx_crypto_ctx *nx_ctx = crypto_tfm_ctx(tfm);
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struct nx_csbcpb *csbcpb = nx_ctx->csbcpb;
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nx_ctx_init(nx_ctx, HCOP_FC_AES);
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switch (key_len) {
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case AES_KEYSIZE_128:
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NX_CPB_SET_KEY_SIZE(csbcpb, NX_KS_AES_128);
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nx_ctx->ap = &nx_ctx->props[NX_PROPS_AES_128];
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break;
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case AES_KEYSIZE_192:
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NX_CPB_SET_KEY_SIZE(csbcpb, NX_KS_AES_192);
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nx_ctx->ap = &nx_ctx->props[NX_PROPS_AES_192];
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break;
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case AES_KEYSIZE_256:
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NX_CPB_SET_KEY_SIZE(csbcpb, NX_KS_AES_256);
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nx_ctx->ap = &nx_ctx->props[NX_PROPS_AES_256];
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break;
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default:
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return -EINVAL;
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}
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csbcpb->cpb.hdr.mode = NX_MODE_AES_CTR;
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memcpy(csbcpb->cpb.aes_ctr.key, in_key, key_len);
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return 0;
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}
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static int ctr3686_aes_nx_set_key(struct crypto_tfm *tfm,
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const u8 *in_key,
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unsigned int key_len)
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{
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struct nx_crypto_ctx *nx_ctx = crypto_tfm_ctx(tfm);
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if (key_len < CTR_RFC3686_NONCE_SIZE)
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return -EINVAL;
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memcpy(nx_ctx->priv.ctr.nonce,
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in_key + key_len - CTR_RFC3686_NONCE_SIZE,
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CTR_RFC3686_NONCE_SIZE);
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key_len -= CTR_RFC3686_NONCE_SIZE;
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return ctr_aes_nx_set_key(tfm, in_key, key_len);
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}
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static int ctr_aes_nx_crypt(struct blkcipher_desc *desc,
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struct scatterlist *dst,
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struct scatterlist *src,
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unsigned int nbytes)
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{
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struct nx_crypto_ctx *nx_ctx = crypto_blkcipher_ctx(desc->tfm);
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struct nx_csbcpb *csbcpb = nx_ctx->csbcpb;
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unsigned long irq_flags;
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unsigned int processed = 0, to_process;
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int rc;
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spin_lock_irqsave(&nx_ctx->lock, irq_flags);
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do {
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to_process = nbytes - processed;
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rc = nx_build_sg_lists(nx_ctx, desc, dst, src, &to_process,
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processed, csbcpb->cpb.aes_ctr.iv);
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if (rc)
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goto out;
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if (!nx_ctx->op.inlen || !nx_ctx->op.outlen) {
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rc = -EINVAL;
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goto out;
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}
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rc = nx_hcall_sync(nx_ctx, &nx_ctx->op,
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desc->flags & CRYPTO_TFM_REQ_MAY_SLEEP);
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if (rc)
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goto out;
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memcpy(desc->info, csbcpb->cpb.aes_cbc.cv, AES_BLOCK_SIZE);
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atomic_inc(&(nx_ctx->stats->aes_ops));
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atomic64_add(csbcpb->csb.processed_byte_count,
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&(nx_ctx->stats->aes_bytes));
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processed += to_process;
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} while (processed < nbytes);
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out:
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spin_unlock_irqrestore(&nx_ctx->lock, irq_flags);
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return rc;
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}
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static int ctr3686_aes_nx_crypt(struct blkcipher_desc *desc,
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struct scatterlist *dst,
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struct scatterlist *src,
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unsigned int nbytes)
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{
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struct nx_crypto_ctx *nx_ctx = crypto_blkcipher_ctx(desc->tfm);
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u8 iv[16];
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memcpy(iv, nx_ctx->priv.ctr.nonce, CTR_RFC3686_IV_SIZE);
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memcpy(iv + CTR_RFC3686_NONCE_SIZE,
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desc->info, CTR_RFC3686_IV_SIZE);
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iv[12] = iv[13] = iv[14] = 0;
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iv[15] = 1;
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desc->info = iv;
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return ctr_aes_nx_crypt(desc, dst, src, nbytes);
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}
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struct crypto_alg nx_ctr_aes_alg = {
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.cra_name = "ctr(aes)",
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.cra_driver_name = "ctr-aes-nx",
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.cra_priority = 300,
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.cra_flags = CRYPTO_ALG_TYPE_BLKCIPHER,
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.cra_blocksize = 1,
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.cra_ctxsize = sizeof(struct nx_crypto_ctx),
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.cra_type = &crypto_blkcipher_type,
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.cra_module = THIS_MODULE,
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.cra_init = nx_crypto_ctx_aes_ctr_init,
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.cra_exit = nx_crypto_ctx_exit,
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.cra_blkcipher = {
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.min_keysize = AES_MIN_KEY_SIZE,
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.max_keysize = AES_MAX_KEY_SIZE,
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.ivsize = AES_BLOCK_SIZE,
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.setkey = ctr_aes_nx_set_key,
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.encrypt = ctr_aes_nx_crypt,
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.decrypt = ctr_aes_nx_crypt,
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}
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};
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struct crypto_alg nx_ctr3686_aes_alg = {
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.cra_name = "rfc3686(ctr(aes))",
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.cra_driver_name = "rfc3686-ctr-aes-nx",
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.cra_priority = 300,
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.cra_flags = CRYPTO_ALG_TYPE_BLKCIPHER,
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.cra_blocksize = 1,
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.cra_ctxsize = sizeof(struct nx_crypto_ctx),
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.cra_type = &crypto_blkcipher_type,
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.cra_module = THIS_MODULE,
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.cra_init = nx_crypto_ctx_aes_ctr_init,
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.cra_exit = nx_crypto_ctx_exit,
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.cra_blkcipher = {
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.min_keysize = AES_MIN_KEY_SIZE + CTR_RFC3686_NONCE_SIZE,
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.max_keysize = AES_MAX_KEY_SIZE + CTR_RFC3686_NONCE_SIZE,
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.ivsize = CTR_RFC3686_IV_SIZE,
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.geniv = "seqiv",
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.setkey = ctr3686_aes_nx_set_key,
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.encrypt = ctr3686_aes_nx_crypt,
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.decrypt = ctr3686_aes_nx_crypt,
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}
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};
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