2cd451792d
0384e90b8 ("spi/mcspi: allow configuration of pin directions") did what
it claimed to do the wrong way around. D0/D1 is configured as output by
*clearing* the bits in the conf registers, hence also breaking the
former default behaviour.
Fix this before that change is merged to mainline.
Signed-off-by: Daniel Mack <zonque@gmail.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
27 lines
490 B
C
27 lines
490 B
C
#ifndef _OMAP2_MCSPI_H
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#define _OMAP2_MCSPI_H
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#define OMAP2_MCSPI_REV 0
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#define OMAP3_MCSPI_REV 1
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#define OMAP4_MCSPI_REV 2
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#define OMAP4_MCSPI_REG_OFFSET 0x100
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#define MCSPI_PINDIR_D0_IN_D1_OUT 0
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#define MCSPI_PINDIR_D0_OUT_D1_IN 1
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struct omap2_mcspi_platform_config {
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unsigned short num_cs;
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unsigned int regs_offset;
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unsigned int pin_dir:1;
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};
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struct omap2_mcspi_dev_attr {
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unsigned short num_chipselect;
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};
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struct omap2_mcspi_device_config {
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unsigned turbo_mode:1;
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};
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#endif
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