linux-hardened/Documentation/devicetree/bindings/mtd/orion-nand.txt
Jamie Lentin a0fabf722c mtd: Add orion_nand devicetree bindings
Allow a NAND chip using the orion_nand driver to be described using devicetree.

Changes since last submission (V4) [Addressing comments by]:-
* WARN when bank-width is out of range [Andrew Lunn]

Changes since last submission (V3):-
* Document all parameters [Grant Likely]
* Convert bank-width to be in bytes
* Add explicit defaults for cle, ale and bank-width

Signed-off-by: Jamie Lentin <jm@lentin.co.uk>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2012-05-15 02:29:11 +00:00

50 lines
1.1 KiB
Text

NAND support for Marvell Orion SoC platforms
Required properties:
- compatible : "mrvl,orion-nand".
- reg : Base physical address of the NAND and length of memory mapped
region
Optional properties:
- cle : Address line number connected to CLE. Default is 0
- ale : Address line number connected to ALE. Default is 1
- bank-width : Width in bytes of the device. Default is 1
- chip-delay : Chip dependent delay for transferring data from array to read
registers in usecs
The device tree may optionally contain sub-nodes describing partitions of the
address space. See partition.txt for more detail.
Example:
nand@f4000000 {
#address-cells = <1>;
#size-cells = <1>;
cle = <0>;
ale = <1>;
bank-width = <1>;
chip-delay = <25>;
compatible = "mrvl,orion-nand";
reg = <0xf4000000 0x400>;
partition@0 {
label = "u-boot";
reg = <0x0000000 0x100000>;
read-only;
};
partition@100000 {
label = "uImage";
reg = <0x0100000 0x200000>;
};
partition@300000 {
label = "dtb";
reg = <0x0300000 0x100000>;
};
partition@400000 {
label = "root";
reg = <0x0400000 0x7d00000>;
};
};