8d802d28c2
Add cache flushing support for aliased V6 caches to flush_dcache_page. Signed-off-by: Russell King <rmk@arm.linux.org.uk>
127 lines
3.6 KiB
C
127 lines
3.6 KiB
C
/*
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* linux/arch/arm/mm/flush.c
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*
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* Copyright (C) 1995-2002 Russell King
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/module.h>
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#include <linux/mm.h>
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#include <linux/pagemap.h>
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#include <asm/cacheflush.h>
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#include <asm/system.h>
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#include <asm/tlbflush.h>
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#ifdef CONFIG_CPU_CACHE_VIPT
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#define ALIAS_FLUSH_START 0xffff4000
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#define TOP_PTE(x) pte_offset_kernel(top_pmd, x)
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static void flush_pfn_alias(unsigned long pfn, unsigned long vaddr)
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{
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unsigned long to = ALIAS_FLUSH_START + (CACHE_COLOUR(vaddr) << PAGE_SHIFT);
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set_pte(TOP_PTE(to), pfn_pte(pfn, PAGE_KERNEL));
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flush_tlb_kernel_page(to);
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asm( "mcrr p15, 0, %1, %0, c14\n"
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" mcrr p15, 0, %1, %0, c5\n"
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:
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: "r" (to), "r" (to + PAGE_SIZE - L1_CACHE_BYTES)
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: "cc");
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}
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#else
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#define flush_pfn_alias(pfn,vaddr) do { } while (0)
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#endif
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static void __flush_dcache_page(struct address_space *mapping, struct page *page)
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{
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struct mm_struct *mm = current->active_mm;
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struct vm_area_struct *mpnt;
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struct prio_tree_iter iter;
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pgoff_t pgoff;
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/*
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* Writeback any data associated with the kernel mapping of this
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* page. This ensures that data in the physical page is mutually
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* coherent with the kernels mapping.
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*/
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__cpuc_flush_dcache_page(page_address(page));
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/*
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* If there's no mapping pointer here, then this page isn't
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* visible to userspace yet, so there are no cache lines
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* associated with any other aliases.
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*/
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if (!mapping)
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return;
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/*
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* This is a page cache page. If we have a VIPT cache, we
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* only need to do one flush - which would be at the relevant
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* userspace colour, which is congruent with page->index.
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*/
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if (cache_is_vipt()) {
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if (cache_is_vipt_aliasing())
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flush_pfn_alias(page_to_pfn(page),
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page->index << PAGE_CACHE_SHIFT);
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return;
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}
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/*
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* There are possible user space mappings of this page:
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* - VIVT cache: we need to also write back and invalidate all user
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* data in the current VM view associated with this page.
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* - aliasing VIPT: we only need to find one mapping of this page.
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*/
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pgoff = page->index << (PAGE_CACHE_SHIFT - PAGE_SHIFT);
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flush_dcache_mmap_lock(mapping);
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vma_prio_tree_foreach(mpnt, &iter, &mapping->i_mmap, pgoff, pgoff) {
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unsigned long offset;
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/*
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* If this VMA is not in our MM, we can ignore it.
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*/
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if (mpnt->vm_mm != mm)
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continue;
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if (!(mpnt->vm_flags & VM_MAYSHARE))
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continue;
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offset = (pgoff - mpnt->vm_pgoff) << PAGE_SHIFT;
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flush_cache_page(mpnt, mpnt->vm_start + offset, page_to_pfn(page));
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}
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flush_dcache_mmap_unlock(mapping);
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}
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/*
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* Ensure cache coherency between kernel mapping and userspace mapping
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* of this page.
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*
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* We have three cases to consider:
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* - VIPT non-aliasing cache: fully coherent so nothing required.
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* - VIVT: fully aliasing, so we need to handle every alias in our
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* current VM view.
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* - VIPT aliasing: need to handle one alias in our current VM view.
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*
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* If we need to handle aliasing:
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* If the page only exists in the page cache and there are no user
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* space mappings, we can be lazy and remember that we may have dirty
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* kernel cache lines for later. Otherwise, we assume we have
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* aliasing mappings.
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*/
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void flush_dcache_page(struct page *page)
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{
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struct address_space *mapping = page_mapping(page);
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if (cache_is_vipt_nonaliasing())
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return;
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if (mapping && !mapping_mapped(mapping))
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set_bit(PG_dcache_dirty, &page->flags);
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else
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__flush_dcache_page(mapping, page);
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}
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EXPORT_SYMBOL(flush_dcache_page);
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