3252a646aa
The MCT has a nice 64-bit counter. That means that we _can_ register as a 64-bit clocksource and sched_clock. ...but that doesn't mean we should. The 64-bit counter is read by reading two 32-bit registers. That means reading needs to be something like: - Read upper half - Read lower half - Read upper half and confirm that it hasn't changed. That wouldn't be terrible, but: - THe MCT isn't very fast to access (hundreds of nanoseconds). - The clocksource is queried _all the time_. In total system profiles of real workloads on ChromeOS, we've seen exynos_frc_read() taking 2% or more of CPU time even after optimizing the 3 reads above to 2 (see below). The MCT is clocked at ~24MHz on all known systems. That means that the 32-bit half of the counter rolls over every ~178 seconds. This inspired an optimization in ChromeOS to cache the upper half between calls, moving 3 reads to 2. ...but we can do better! Having a 32-bit timer that flips every 178 seconds is more than sufficient for Linux. Let's just use the lower half of the MCT. Times on 5420 to do 1000000 gettimeofday() calls from userspace: * Original code: 1323852 us * ChromeOS cache upper half: 1173084 us * ChromeOS + ldmia to optimize: 1045674 us * Use lower 32-bit only (this code): 1014429 us As you can see, the time used doesn't increase linearly with the number of reads and we can make 64-bit work almost as fast as 32-bit with a bit of assembly code. But since there's no real gain for 64-bit, let's go with the simplest and fastest implementation. Note: with this change roughly half the time for gettimeofday() is spent in exynos_frc_read(). The rest is timer / system call overhead. Also note: this patch disables the use of the MCT on ARM64 systems until we've sorted out how to make "cycles_t" always 32-bit. Really ARM64 systems should be using arch timers anyway. Signed-off-by: Doug Anderson <dianders@chromium.org> Acked-by Vincent Guittot <vincent.guittot@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
219 lines
5.3 KiB
Text
219 lines
5.3 KiB
Text
menu "Clock Source drivers"
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config CLKSRC_OF
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bool
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config CLKSRC_I8253
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bool
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config CLKEVT_I8253
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bool
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config I8253_LOCK
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bool
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config CLKBLD_I8253
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def_bool y if CLKSRC_I8253 || CLKEVT_I8253 || I8253_LOCK
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config CLKSRC_MMIO
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bool
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config DW_APB_TIMER
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bool
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config DW_APB_TIMER_OF
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bool
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select DW_APB_TIMER
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select CLKSRC_OF
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config ARMADA_370_XP_TIMER
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bool
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select CLKSRC_OF
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config ORION_TIMER
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select CLKSRC_OF
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select CLKSRC_MMIO
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bool
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config SUN4I_TIMER
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select CLKSRC_MMIO
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bool
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config SUN5I_HSTIMER
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select CLKSRC_MMIO
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bool
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config VT8500_TIMER
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bool
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config CADENCE_TTC_TIMER
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bool
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config CLKSRC_NOMADIK_MTU
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bool
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depends on (ARCH_NOMADIK || ARCH_U8500)
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select CLKSRC_MMIO
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help
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Support for Multi Timer Unit. MTU provides access
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to multiple interrupt generating programmable
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32-bit free running decrementing counters.
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config CLKSRC_NOMADIK_MTU_SCHED_CLOCK
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bool
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depends on CLKSRC_NOMADIK_MTU
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help
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Use the Multi Timer Unit as the sched_clock.
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config CLKSRC_DBX500_PRCMU
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bool "Clocksource PRCMU Timer"
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depends on UX500_SOC_DB8500
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default y
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help
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Use the always on PRCMU Timer as clocksource
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config CLKSRC_DBX500_PRCMU_SCHED_CLOCK
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bool "Clocksource PRCMU Timer sched_clock"
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depends on (CLKSRC_DBX500_PRCMU && !CLKSRC_NOMADIK_MTU_SCHED_CLOCK)
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default y
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help
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Use the always on PRCMU Timer as sched_clock
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config CLKSRC_EFM32
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bool "Clocksource for Energy Micro's EFM32 SoCs" if !ARCH_EFM32
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depends on OF && ARM && (ARCH_EFM32 || COMPILE_TEST)
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select CLKSRC_MMIO
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default ARCH_EFM32
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help
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Support to use the timers of EFM32 SoCs as clock source and clock
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event device.
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config ARM_ARCH_TIMER
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bool
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select CLKSRC_OF if OF
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config ARM_ARCH_TIMER_EVTSTREAM
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bool "Support for ARM architected timer event stream generation"
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default y if ARM_ARCH_TIMER
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depends on ARM_ARCH_TIMER
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help
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This option enables support for event stream generation based on
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the ARM architected timer. It is used for waking up CPUs executing
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the wfe instruction at a frequency represented as a power-of-2
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divisor of the clock rate.
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The main use of the event stream is wfe-based timeouts of userspace
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locking implementations. It might also be useful for imposing timeout
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on wfe to safeguard against any programming errors in case an expected
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event is not generated.
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This must be disabled for hardware validation purposes to detect any
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hardware anomalies of missing events.
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config ARM_GLOBAL_TIMER
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bool
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select CLKSRC_OF if OF
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help
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This options enables support for the ARM global timer unit
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config CLKSRC_ARM_GLOBAL_TIMER_SCHED_CLOCK
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bool
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depends on ARM_GLOBAL_TIMER
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default y
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help
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Use ARM global timer clock source as sched_clock
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config CLKSRC_METAG_GENERIC
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def_bool y if METAG
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help
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This option enables support for the Meta per-thread timers.
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config CLKSRC_EXYNOS_MCT
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def_bool y if ARCH_EXYNOS
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depends on !ARM64
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help
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Support for Multi Core Timer controller on Exynos SoCs.
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config CLKSRC_SAMSUNG_PWM
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bool
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help
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This is a new clocksource driver for the PWM timer found in
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Samsung S3C, S5P and Exynos SoCs, replacing an earlier driver
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for all devicetree enabled platforms. This driver will be
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needed only on systems that do not have the Exynos MCT available.
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config FSL_FTM_TIMER
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bool
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help
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Support for Freescale FlexTimer Module (FTM) timer.
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config VF_PIT_TIMER
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bool
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help
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Support for Period Interrupt Timer on Freescale Vybrid Family SoCs.
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config SYS_SUPPORTS_SH_CMT
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bool
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config MTK_TIMER
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select CLKSRC_OF
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select CLKSRC_MMIO
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bool
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config SYS_SUPPORTS_SH_MTU2
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bool
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config SYS_SUPPORTS_SH_TMU
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bool
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config SYS_SUPPORTS_EM_STI
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bool
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config SH_TIMER_CMT
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bool "Renesas CMT timer driver" if COMPILE_TEST
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depends on GENERIC_CLOCKEVENTS
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default SYS_SUPPORTS_SH_CMT
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help
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This enables build of a clocksource and clockevent driver for
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the Compare Match Timer (CMT) hardware available in 16/32/48-bit
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variants on a wide range of Mobile and Automotive SoCs from Renesas.
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config SH_TIMER_MTU2
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bool "Renesas MTU2 timer driver" if COMPILE_TEST
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depends on GENERIC_CLOCKEVENTS
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default SYS_SUPPORTS_SH_MTU2
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help
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This enables build of a clockevent driver for the Multi-Function
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Timer Pulse Unit 2 (MTU2) hardware available on SoCs from Renesas.
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This hardware comes with 16 bit-timer registers.
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config SH_TIMER_TMU
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bool "Renesas TMU timer driver" if COMPILE_TEST
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depends on GENERIC_CLOCKEVENTS
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default SYS_SUPPORTS_SH_TMU
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help
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This enables build of a clocksource and clockevent driver for
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the 32-bit Timer Unit (TMU) hardware available on a wide range
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SoCs from Renesas.
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config EM_TIMER_STI
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bool "Renesas STI timer driver" if COMPILE_TEST
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depends on GENERIC_CLOCKEVENTS && HAS_IOMEM
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default SYS_SUPPORTS_EM_STI
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help
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This enables build of a clocksource and clockevent driver for
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the 48-bit System Timer (STI) hardware available on a SoCs
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such as EMEV2 from former NEC Electronics.
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config CLKSRC_QCOM
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bool
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config CLKSRC_VERSATILE
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bool "ARM Versatile (Express) reference platforms clock source"
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depends on GENERIC_SCHED_CLOCK && !ARCH_USES_GETTIMEOFFSET
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select CLKSRC_OF
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default y if MFD_VEXPRESS_SYSREG
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help
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This option enables clock source based on free running
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counter available in the "System Registers" block of
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ARM Versatile, RealView and Versatile Express reference
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platforms.
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endmenu
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