linux-hardened/arch/arm64/mm
Arun Chandran 5e05153144 arm64: convert part of soft_restart() to assembly
The current soft_restart() and setup_restart implementations incorrectly
assume that compiler will not spill/fill values to/from stack. However
this assumption seems to be wrong, revealed by the disassembly of the
currently existing code (v3.16) built with Linaro GCC 4.9-2014.05.

ffffffc000085224 <soft_restart>:
ffffffc000085224:  a9be7bfd  stp    x29, x30, [sp,#-32]!
ffffffc000085228:  910003fd  mov    x29, sp
ffffffc00008522c:  f9000fa0  str    x0, [x29,#24]
ffffffc000085230:  94003d21  bl     ffffffc0000946b4 <setup_mm_for_reboot>
ffffffc000085234:  94003b33  bl     ffffffc000093f00 <flush_cache_all>
ffffffc000085238:  94003dfa  bl     ffffffc000094a20 <cpu_cache_off>
ffffffc00008523c:  94003b31  bl     ffffffc000093f00 <flush_cache_all>
ffffffc000085240:  b0003321  adrp   x1, ffffffc0006ea000 <reset_devices>

ffffffc000085244:  f9400fa0  ldr    x0, [x29,#24] ----> spilled addr
ffffffc000085248:  f942fc22  ldr    x2, [x1,#1528] ----> global memstart_addr

ffffffc00008524c:  f0000061  adrp   x1, ffffffc000094000 <__inval_cache_range+0x40>
ffffffc000085250:  91290021  add    x1, x1, #0xa40
ffffffc000085254:  8b010041  add    x1, x2, x1
ffffffc000085258:  d2c00802  mov    x2, #0x4000000000           // #274877906944
ffffffc00008525c:  8b020021  add    x1, x1, x2
ffffffc000085260:  d63f0020  blr    x1
...

Here the compiler generates memory accesses after the cache is disabled,
loading stale values for the spilled value and global variable. As we cannot
control when the compiler will access memory we must rewrite the
functions in assembly to stash values we need in registers prior to
disabling the cache, avoiding the use of memory.

Reviewed-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Arun Chandran <achandran@mvista.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
2014-09-08 14:39:18 +01:00
..
cache.S arm64: mm: use inner-shareable barriers for inner-shareable maintenance 2014-05-09 17:21:24 +01:00
context.c arm64: Process management 2012-09-17 13:41:58 +01:00
copypage.c arm64: export __cpu_{clear,copy}_user_page functions 2014-07-08 17:30:51 +01:00
dma-mapping.c arm64: Clean up the default pgprot setting 2014-05-09 15:53:37 +01:00
extable.c arm64: MMU fault handling and page table management 2012-09-17 13:41:57 +01:00
fault.c arm64: mm: Implement 4 levels of translation tables 2014-07-23 15:27:40 +01:00
flush.c arm64: mm: Make icache synchronisation logic huge page aware 2014-07-04 14:26:01 +01:00
hugetlbpage.c hugetlb: restrict hugepage_migration_support() to x86_64 2014-06-04 16:53:51 -07:00
init.c arm64: ignore DT memreserve entries when booting in UEFI mode 2014-08-19 20:22:03 +01:00
ioremap.c arm64: Convert bool ARM64_x_LEVELS to int ARM64_PGTABLE_LEVELS 2014-07-23 15:27:46 +01:00
Makefile arm64: mm: Optimise tlb flush logic where we have >4K granule 2014-05-09 17:00:48 +01:00
mm.h arm64: Remove __flush_dcache_page() 2013-06-07 17:58:30 +01:00
mmap.c mm: remove free_area_cache 2013-07-10 18:11:34 -07:00
mmu.c arm64: mm: Implement 4 levels of translation tables 2014-07-23 15:27:40 +01:00
pgd.c arm64: simplify pgd_alloc 2014-02-05 10:45:07 +00:00
proc-macros.S arm64: mm: use ubfm for dcache_line_size 2014-01-22 16:23:58 +00:00
proc.S arm64: convert part of soft_restart() to assembly 2014-09-08 14:39:18 +01:00