linux-hardened/arch/riscv/kernel
Palmer Dabbelt cc6c98485f RISC-V: Move to the new GENERIC_IRQ_MULTI_HANDLER handler
The existing mechanism for handling IRQs on RISC-V is pretty ugly: the irq
entry code selects the handler via Kconfig dependencies.

Use the new generic IRQ handling infastructure, which allows boot time
registration of the low level entry handler.

This does add an additional load to the interrupt latency, but there's a
lot of tuning left to be done there on RISC-V so it's OK for now.

Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Acked-by: Stafford Horne <shorne@gmail.com>
Cc: jonas@southpole.se
Cc: catalin.marinas@arm.com
Cc: Will Deacon <will.deacon@arm.com>
Cc: linux@armlinux.org.uk
Cc: stefan.kristiansson@saunalahti.fi
Cc: openrisc@lists.librecores.org
Cc: linux-riscv@lists.infradead.org
Cc: linux-arm-kernel@lists.infradead.org
Link: https://lkml.kernel.org/r/20180307235731.22627-3-palmer@sifive.com
2018-03-14 21:46:29 +01:00
..
vdso RISC-V: Make __NR_riscv_flush_icache visible to userspace 2018-01-07 15:14:37 -08:00
.gitignore RISC-V: Build Infrastructure 2017-09-26 15:26:49 -07:00
asm-offsets.c RISC-V: Task implementation 2017-09-26 15:26:46 -07:00
cacheinfo.c RISC-V: Init and Halt Code 2017-09-26 15:26:44 -07:00
cpu.c RISC-V: Init and Halt Code 2017-09-26 15:26:44 -07:00
cpufeature.c RISC-V: User-facing API 2017-09-26 15:26:48 -07:00
entry.S RISC-V: Move to the new GENERIC_IRQ_MULTI_HANDLER handler 2018-03-14 21:46:29 +01:00
ftrace.c riscv/ftrace: Add basic support 2018-01-30 19:10:54 -08:00
head.S Rename sbi_save to parse_dtb to improve code readability 2018-02-20 10:56:26 -08:00
irq.c RISC-V: Move to the new GENERIC_IRQ_MULTI_HANDLER handler 2018-03-14 21:46:29 +01:00
Makefile riscv/ftrace: Add basic support 2018-01-30 19:10:54 -08:00
mcount.S riscv/ftrace: Add basic support 2018-01-30 19:10:54 -08:00
module.c RISC-V: User-facing API 2017-09-26 15:26:48 -07:00
process.c Merge branch 'work.whack-a-mole' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs 2018-01-31 19:18:12 -08:00
ptrace.c RISC-V: User-facing API 2017-09-26 15:26:48 -07:00
reset.c RISC-V: Init and Halt Code 2017-09-26 15:26:44 -07:00
riscv_ksyms.c RISC-V: Export some expected symbols for modules 2017-11-30 10:01:10 -08:00
setup.c Rename sbi_save to parse_dtb to improve code readability 2018-02-20 10:56:26 -08:00
signal.c RISC-V: User-facing API 2017-09-26 15:26:48 -07:00
smp.c RISC-V: Fixes for clean allmodconfig build 2017-12-01 13:31:31 -08:00
smpboot.c RISC-V: Init and Halt Code 2017-09-26 15:26:44 -07:00
stacktrace.c RISC-V: Generic library routines and assembly 2017-09-26 15:26:45 -07:00
sys_riscv.c RISC-V: Logical vs Bitwise typo 2017-12-11 07:51:06 -08:00
syscall_table.c RISC-V: Make __NR_riscv_flush_icache visible to userspace 2018-01-07 15:14:37 -08:00
time.c RISC-V: Init and Halt Code 2017-09-26 15:26:44 -07:00
traps.c RISC-V: Init and Halt Code 2017-09-26 15:26:44 -07:00
vdso.c riscv: remove redundant unlikely() 2018-01-30 19:12:06 -08:00
vmlinux.lds.S RISC-V: Build Infrastructure 2017-09-26 15:26:49 -07:00