4295b898f5
In order to provide PMU name strings compatible with the OProfile user ABI, an enumeration of all PMUs is currently used by perf to identify each PMU uniquely. Unfortunately, this does not scale well in the presence of multiple PMUs and creates a single, global namespace across all PMUs in the system. This patch removes the enumeration and instead uses the name string for the PMU to map onto the OProfile variant. perf_pmu_name is implemented for CPU PMUs, which is all that OProfile cares about anyway. Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
133 lines
3 KiB
C
133 lines
3 KiB
C
/**
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* @file common.c
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*
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* @remark Copyright 2004 Oprofile Authors
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* @remark Copyright 2010 ARM Ltd.
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* @remark Read the file COPYING
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*
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* @author Zwane Mwaikambo
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* @author Will Deacon [move to perf]
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*/
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#include <linux/cpumask.h>
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#include <linux/init.h>
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#include <linux/mutex.h>
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#include <linux/oprofile.h>
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#include <linux/perf_event.h>
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#include <linux/platform_device.h>
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#include <linux/slab.h>
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#include <asm/stacktrace.h>
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#include <linux/uaccess.h>
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#include <asm/perf_event.h>
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#include <asm/ptrace.h>
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#ifdef CONFIG_HW_PERF_EVENTS
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/*
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* OProfile has a curious naming scheme for the ARM PMUs, but they are
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* part of the user ABI so we need to map from the perf PMU name for
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* supported PMUs.
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*/
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static struct op_perf_name {
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char *perf_name;
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char *op_name;
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} op_perf_name_map[] = {
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{ "xscale1", "arm/xscale1" },
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{ "xscale1", "arm/xscale2" },
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{ "v6", "arm/armv6" },
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{ "v6mpcore", "arm/mpcore" },
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{ "ARMv7 Cortex-A8", "arm/armv7" },
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{ "ARMv7 Cortex-A9", "arm/armv7-ca9" },
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};
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char *op_name_from_perf_id(void)
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{
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int i;
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struct op_perf_name names;
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const char *perf_name = perf_pmu_name();
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for (i = 0; i < ARRAY_SIZE(op_perf_name_map); ++i) {
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names = op_perf_name_map[i];
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if (!strcmp(names.perf_name, perf_name))
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return names.op_name;
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}
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return NULL;
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}
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#endif
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static int report_trace(struct stackframe *frame, void *d)
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{
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unsigned int *depth = d;
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if (*depth) {
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oprofile_add_trace(frame->pc);
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(*depth)--;
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}
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return *depth == 0;
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}
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/*
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* The registers we're interested in are at the end of the variable
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* length saved register structure. The fp points at the end of this
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* structure so the address of this struct is:
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* (struct frame_tail *)(xxx->fp)-1
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*/
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struct frame_tail {
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struct frame_tail *fp;
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unsigned long sp;
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unsigned long lr;
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} __attribute__((packed));
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static struct frame_tail* user_backtrace(struct frame_tail *tail)
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{
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struct frame_tail buftail[2];
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/* Also check accessibility of one struct frame_tail beyond */
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if (!access_ok(VERIFY_READ, tail, sizeof(buftail)))
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return NULL;
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if (__copy_from_user_inatomic(buftail, tail, sizeof(buftail)))
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return NULL;
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oprofile_add_trace(buftail[0].lr);
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/* frame pointers should strictly progress back up the stack
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* (towards higher addresses) */
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if (tail + 1 >= buftail[0].fp)
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return NULL;
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return buftail[0].fp-1;
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}
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static void arm_backtrace(struct pt_regs * const regs, unsigned int depth)
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{
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struct frame_tail *tail = ((struct frame_tail *) regs->ARM_fp) - 1;
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if (!user_mode(regs)) {
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struct stackframe frame;
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frame.fp = regs->ARM_fp;
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frame.sp = regs->ARM_sp;
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frame.lr = regs->ARM_lr;
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frame.pc = regs->ARM_pc;
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walk_stackframe(&frame, report_trace, &depth);
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return;
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}
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while (depth-- && tail && !((unsigned long) tail & 3))
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tail = user_backtrace(tail);
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}
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int __init oprofile_arch_init(struct oprofile_operations *ops)
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{
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/* provide backtrace support also in timer mode: */
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ops->backtrace = arm_backtrace;
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return oprofile_perf_init(ops);
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}
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void oprofile_arch_exit(void)
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{
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oprofile_perf_exit();
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}
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