Ganesan Ramalingam d66f3f0e10 MIPS: Add MSI support for XLP9XX ... In XLP9XX, the interrupt routing table for MSI-X has been moved to the PCIe controller's config space from PIC. There are also 32 MSI-X interrupts available per link on XLP9XX. Update XLP MSI/MSI-X code to handle this. Signed-off-by: Ganesan Ramalingam <ganesanr@broadcom.com> Signed-off-by: Jayachandran C <jchandra@broadcom.com> Cc: g@linux-mips.org Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/6912/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>		2014-05-30 16:51:02 +02:00
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asm	MIPS: Add MSI support for XLP9XX	2014-05-30 16:51:02 +02:00
uapi/asm	MIPS: uasm: Add mflo uasm instruction	2014-05-30 15:57:44 +02:00