74ba9207e1
Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details you should have received a copy of the gnu general public license along with this program if not write to the free software foundation inc 675 mass ave cambridge ma 02139 usa extracted by the scancode license scanner the SPDX license identifier GPL-2.0-or-later has been chosen to replace the boilerplate/reference in 441 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Michael Ellerman <mpe@ellerman.id.au> (powerpc) Reviewed-by: Richard Fontana <rfontana@redhat.com> Reviewed-by: Allison Randal <allison@lohutok.net> Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190520071858.739733335@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
120 lines
3.1 KiB
C
120 lines
3.1 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* board.c: STB225 board support.
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*
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* Copyright 2008 NXP Semiconductors
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* Chris Steel <chris.steel@nxp.com>
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* Daniel Laird <daniel.j.laird@nxp.com>
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*
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* Based on software written by:
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* Nikita Youshchenko <yoush@debian.org>, based on PNX8550 code.
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*/
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#include <linux/init.h>
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#include <asm/bootinfo.h>
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#include <linux/mm.h>
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#include <pnx833x.h>
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#include <gpio.h>
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/* endianess twiddlers */
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#define PNX8335_DEBUG0 0x4400
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#define PNX8335_DEBUG1 0x4404
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#define PNX8335_DEBUG2 0x4408
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#define PNX8335_DEBUG3 0x440c
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#define PNX8335_DEBUG4 0x4410
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#define PNX8335_DEBUG5 0x4414
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#define PNX8335_DEBUG6 0x4418
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#define PNX8335_DEBUG7 0x441c
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int prom_argc;
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char **prom_argv, **prom_envp;
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extern void prom_init_cmdline(void);
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extern char *prom_getenv(char *envname);
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const char *get_system_type(void)
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{
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return "NXP STB22x";
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}
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static inline unsigned long env_or_default(char *env, unsigned long dfl)
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{
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char *str = prom_getenv(env);
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return str ? simple_strtol(str, 0, 0) : dfl;
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}
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void __init prom_init(void)
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{
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unsigned long memsize;
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prom_argc = fw_arg0;
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prom_argv = (char **)fw_arg1;
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prom_envp = (char **)fw_arg2;
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prom_init_cmdline();
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memsize = env_or_default("memsize", 0x02000000);
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add_memory_region(0, memsize, BOOT_MEM_RAM);
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}
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void __init pnx833x_board_setup(void)
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{
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pnx833x_gpio_select_function_alt(4);
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pnx833x_gpio_select_output(4);
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pnx833x_gpio_select_function_alt(5);
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pnx833x_gpio_select_input(5);
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pnx833x_gpio_select_function_alt(6);
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pnx833x_gpio_select_input(6);
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pnx833x_gpio_select_function_alt(7);
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pnx833x_gpio_select_output(7);
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pnx833x_gpio_select_function_alt(25);
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pnx833x_gpio_select_function_alt(26);
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pnx833x_gpio_select_function_alt(27);
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pnx833x_gpio_select_function_alt(28);
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pnx833x_gpio_select_function_alt(29);
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pnx833x_gpio_select_function_alt(30);
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pnx833x_gpio_select_function_alt(31);
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pnx833x_gpio_select_function_alt(32);
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pnx833x_gpio_select_function_alt(33);
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#if IS_ENABLED(CONFIG_MTD_NAND_PLATFORM)
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/* Setup MIU for NAND access on CS0...
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*
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* (it seems that we must also configure CS1 for reliable operation,
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* otherwise the first read ID command will fail if it's read as 4 bytes
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* but pass if it's read as 1 word.)
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*/
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/* Setup MIU CS0 & CS1 timing */
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PNX833X_MIU_SEL0 = 0;
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PNX833X_MIU_SEL1 = 0;
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PNX833X_MIU_SEL0_TIMING = 0x50003081;
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PNX833X_MIU_SEL1_TIMING = 0x50003081;
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/* Setup GPIO 00 for use as MIU CS1 (CS0 is not multiplexed, so does not need this) */
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pnx833x_gpio_select_function_alt(0);
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/* Setup GPIO 04 to input NAND read/busy signal */
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pnx833x_gpio_select_function_io(4);
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pnx833x_gpio_select_input(4);
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/* Setup GPIO 05 to disable NAND write protect */
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pnx833x_gpio_select_function_io(5);
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pnx833x_gpio_select_output(5);
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pnx833x_gpio_write(1, 5);
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#elif IS_ENABLED(CONFIG_MTD_CFI)
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/* Set up MIU for 16-bit NOR access on CS0 and CS1... */
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/* Setup MIU CS0 & CS1 timing */
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PNX833X_MIU_SEL0 = 1;
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PNX833X_MIU_SEL1 = 1;
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PNX833X_MIU_SEL0_TIMING = 0x6A08D082;
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PNX833X_MIU_SEL1_TIMING = 0x6A08D082;
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/* Setup GPIO 00 for use as MIU CS1 (CS0 is not multiplexed, so does not need this) */
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pnx833x_gpio_select_function_alt(0);
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#endif
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}
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