046835b4aa
ARMv8R/M architecture defines new memory protection scheme - PMSAv8 which is not compatible with PMSAv7. Key differences to PMSAv7 are: - Region geometry is defined by base and limit addresses - Addresses need to be either 32 or 64 byte aligned - No region priority due to overlapping regions are not allowed - It is unified, i.e. no distinction between data/instruction regions - Memory attributes are controlled via MAIR This patch implements support for PMSAv8 MPU defined by ARMv8R/M architecture. Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
200 lines
4.8 KiB
ArmAsm
200 lines
4.8 KiB
ArmAsm
/* SPDX-License-Identifier: GPL-2.0 */
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/* ld script to make ARM Linux kernel
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* taken from the i386 version by Russell King
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* Written by Martin Mares <mj@atrey.karlin.mff.cuni.cz>
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*/
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/* No __ro_after_init data in the .rodata section - which will always be ro */
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#define RO_AFTER_INIT_DATA
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#include <linux/sizes.h>
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#include <asm-generic/vmlinux.lds.h>
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#include <asm/cache.h>
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#include <asm/thread_info.h>
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#include <asm/memory.h>
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#include <asm/mpu.h>
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#include <asm/page.h>
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#include "vmlinux.lds.h"
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OUTPUT_ARCH(arm)
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ENTRY(stext)
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#ifndef __ARMEB__
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jiffies = jiffies_64;
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#else
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jiffies = jiffies_64 + 4;
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#endif
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SECTIONS
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{
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/*
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* XXX: The linker does not define how output sections are
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* assigned to input sections when there are multiple statements
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* matching the same input section name. There is no documented
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* order of matching.
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*
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* unwind exit sections must be discarded before the rest of the
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* unwind sections get included.
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*/
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/DISCARD/ : {
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ARM_DISCARD
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*(.alt.smp.init)
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*(.pv_table)
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}
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. = XIP_VIRT_ADDR(CONFIG_XIP_PHYS_ADDR);
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_xiprom = .; /* XIP ROM area to be mapped */
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.head.text : {
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_text = .;
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HEAD_TEXT
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}
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.text : { /* Real text segment */
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_stext = .; /* Text and read-only data */
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ARM_TEXT
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}
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RO_DATA(PAGE_SIZE)
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. = ALIGN(4);
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__ex_table : AT(ADDR(__ex_table) - LOAD_OFFSET) {
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__start___ex_table = .;
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ARM_MMU_KEEP(*(__ex_table))
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__stop___ex_table = .;
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}
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#ifdef CONFIG_ARM_UNWIND
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ARM_UNWIND_SECTIONS
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#endif
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NOTES
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_etext = .; /* End of text and rodata section */
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ARM_VECTORS
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INIT_TEXT_SECTION(8)
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.exit.text : {
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ARM_EXIT_KEEP(EXIT_TEXT)
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}
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.init.proc.info : {
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ARM_CPU_DISCARD(PROC_INFO)
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}
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.init.arch.info : {
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__arch_info_begin = .;
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*(.arch.info.init)
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__arch_info_end = .;
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}
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.init.tagtable : {
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__tagtable_begin = .;
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*(.taglist.init)
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__tagtable_end = .;
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}
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.init.rodata : {
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INIT_SETUP(16)
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INIT_CALLS
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CON_INITCALL
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SECURITY_INITCALL
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INIT_RAM_FS
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}
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#ifdef CONFIG_ARM_MPU
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. = ALIGN(SZ_128K);
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#endif
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_exiprom = .; /* End of XIP ROM area */
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/*
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* From this point, stuff is considered writable and will be copied to RAM
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*/
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__data_loc = ALIGN(4); /* location in file */
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. = PAGE_OFFSET + TEXT_OFFSET; /* location in memory */
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#undef LOAD_OFFSET
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#define LOAD_OFFSET (PAGE_OFFSET + TEXT_OFFSET - __data_loc)
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. = ALIGN(THREAD_SIZE);
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_sdata = .;
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RW_DATA_SECTION(L1_CACHE_BYTES, PAGE_SIZE, THREAD_SIZE)
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.data.ro_after_init : AT(ADDR(.data.ro_after_init) - LOAD_OFFSET) {
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*(.data..ro_after_init)
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}
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_edata = .;
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. = ALIGN(PAGE_SIZE);
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__init_begin = .;
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.init.data : AT(ADDR(.init.data) - LOAD_OFFSET) {
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INIT_DATA
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}
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.exit.data : AT(ADDR(.exit.data) - LOAD_OFFSET) {
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ARM_EXIT_KEEP(EXIT_DATA)
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}
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#ifdef CONFIG_SMP
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PERCPU_SECTION(L1_CACHE_BYTES)
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#endif
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#ifdef CONFIG_HAVE_TCM
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ARM_TCM
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#endif
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/*
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* End of copied data. We need a dummy section to get its LMA.
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* Also located before final ALIGN() as trailing padding is not stored
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* in the resulting binary file and useless to copy.
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*/
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.data.endmark : AT(ADDR(.data.endmark) - LOAD_OFFSET) { }
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_edata_loc = LOADADDR(.data.endmark);
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. = ALIGN(PAGE_SIZE);
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__init_end = .;
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BSS_SECTION(0, 0, 8)
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#ifdef CONFIG_ARM_MPU
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. = ALIGN(PMSAv8_MINALIGN);
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#endif
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_end = .;
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STABS_DEBUG
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}
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/*
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* These must never be empty
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* If you have to comment these two assert statements out, your
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* binutils is too old (for other reasons as well)
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*/
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ASSERT((__proc_info_end - __proc_info_begin), "missing CPU support")
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ASSERT((__arch_info_end - __arch_info_begin), "no machine record defined")
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/*
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* The HYP init code can't be more than a page long,
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* and should not cross a page boundary.
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* The above comment applies as well.
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*/
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ASSERT(__hyp_idmap_text_end - (__hyp_idmap_text_start & PAGE_MASK) <= PAGE_SIZE,
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"HYP init code too big or misaligned")
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#ifdef CONFIG_XIP_DEFLATED_DATA
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/*
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* The .bss is used as a stack area for __inflate_kernel_data() whose stack
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* frame is 9568 bytes. Make sure it has extra room left.
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*/
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ASSERT((_end - __bss_start) >= 12288, ".bss too small for CONFIG_XIP_DEFLATED_DATA")
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#endif
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#ifdef CONFIG_ARM_MPU
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/*
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* Due to PMSAv7 restriction on base address and size we have to
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* enforce minimal alignment restrictions. It was seen that weaker
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* alignment restriction on _xiprom will likely force XIP address
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* space spawns multiple MPU regions thus it is likely we run in
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* situation when we are reprogramming MPU region we run on with
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* something which doesn't cover reprogramming code itself, so as soon
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* as we update MPU settings we'd immediately try to execute straight
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* from background region which is XN.
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* It seem that alignment in 1M should suit most users.
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* _exiprom is aligned as 1/8 of 1M so can be covered by subregion
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* disable
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*/
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ASSERT(!(_xiprom & (SZ_1M - 1)), "XIP start address may cause MPU programming issues")
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ASSERT(!(_exiprom & (SZ_128K - 1)), "XIP end address may cause MPU programming issues")
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#endif
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