bb8187d35f
Hardware with MCA bus is limited to 386 and 486 class machines that are now 20+ years old and typically with less than 32MB of memory. A quick search on the internet, and you see that even the MCA hobbyist/enthusiast community has lost interest in the early 2000 era and never really even moved ahead from the 2.4 kernels to the 2.6 series. This deletes anything remaining related to CONFIG_MCA from core kernel code and from the x86 architecture. There is no point in carrying this any further into the future. One complication to watch for is inadvertently scooping up stuff relating to machine check, since there is overlap in the TLA name space (e.g. arch/x86/boot/mca.c). Cc: Thomas Gleixner <tglx@linutronix.de> Cc: James Bottomley <JBottomley@Parallels.com> Cc: x86@kernel.org Acked-by: Ingo Molnar <mingo@elte.hu> Acked-by: H. Peter Anvin <hpa@zytor.com> Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
421 lines
11 KiB
C
421 lines
11 KiB
C
/*
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* I2O user space accessible structures/APIs
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*
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* (c) Copyright 1999, 2000 Red Hat Software
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*
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*************************************************************************
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*
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* This header file defines the I2O APIs that are available to both
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* the kernel and user level applications. Kernel specific structures
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* are defined in i2o_osm. OSMs should include _only_ i2o_osm.h which
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* automatically includes this file.
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*
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*/
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#ifndef _I2O_DEV_H
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#define _I2O_DEV_H
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/* How many controllers are we allowing */
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#define MAX_I2O_CONTROLLERS 32
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#include <linux/ioctl.h>
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#include <linux/types.h>
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/*
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* I2O Control IOCTLs and structures
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*/
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#define I2O_MAGIC_NUMBER 'i'
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#define I2OGETIOPS _IOR(I2O_MAGIC_NUMBER,0,__u8[MAX_I2O_CONTROLLERS])
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#define I2OHRTGET _IOWR(I2O_MAGIC_NUMBER,1,struct i2o_cmd_hrtlct)
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#define I2OLCTGET _IOWR(I2O_MAGIC_NUMBER,2,struct i2o_cmd_hrtlct)
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#define I2OPARMSET _IOWR(I2O_MAGIC_NUMBER,3,struct i2o_cmd_psetget)
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#define I2OPARMGET _IOWR(I2O_MAGIC_NUMBER,4,struct i2o_cmd_psetget)
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#define I2OSWDL _IOWR(I2O_MAGIC_NUMBER,5,struct i2o_sw_xfer)
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#define I2OSWUL _IOWR(I2O_MAGIC_NUMBER,6,struct i2o_sw_xfer)
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#define I2OSWDEL _IOWR(I2O_MAGIC_NUMBER,7,struct i2o_sw_xfer)
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#define I2OVALIDATE _IOR(I2O_MAGIC_NUMBER,8,__u32)
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#define I2OHTML _IOWR(I2O_MAGIC_NUMBER,9,struct i2o_html)
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#define I2OEVTREG _IOW(I2O_MAGIC_NUMBER,10,struct i2o_evt_id)
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#define I2OEVTGET _IOR(I2O_MAGIC_NUMBER,11,struct i2o_evt_info)
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#define I2OPASSTHRU _IOR(I2O_MAGIC_NUMBER,12,struct i2o_cmd_passthru)
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#define I2OPASSTHRU32 _IOR(I2O_MAGIC_NUMBER,12,struct i2o_cmd_passthru32)
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struct i2o_cmd_passthru32 {
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unsigned int iop; /* IOP unit number */
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__u32 msg; /* message */
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};
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struct i2o_cmd_passthru {
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unsigned int iop; /* IOP unit number */
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void __user *msg; /* message */
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};
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struct i2o_cmd_hrtlct {
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unsigned int iop; /* IOP unit number */
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void __user *resbuf; /* Buffer for result */
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unsigned int __user *reslen; /* Buffer length in bytes */
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};
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struct i2o_cmd_psetget {
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unsigned int iop; /* IOP unit number */
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unsigned int tid; /* Target device TID */
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void __user *opbuf; /* Operation List buffer */
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unsigned int oplen; /* Operation List buffer length in bytes */
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void __user *resbuf; /* Result List buffer */
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unsigned int __user *reslen; /* Result List buffer length in bytes */
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};
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struct i2o_sw_xfer {
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unsigned int iop; /* IOP unit number */
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unsigned char flags; /* Flags field */
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unsigned char sw_type; /* Software type */
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unsigned int sw_id; /* Software ID */
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void __user *buf; /* Pointer to software buffer */
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unsigned int __user *swlen; /* Length of software data */
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unsigned int __user *maxfrag; /* Maximum fragment count */
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unsigned int __user *curfrag; /* Current fragment count */
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};
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struct i2o_html {
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unsigned int iop; /* IOP unit number */
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unsigned int tid; /* Target device ID */
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unsigned int page; /* HTML page */
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void __user *resbuf; /* Buffer for reply HTML page */
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unsigned int __user *reslen; /* Length in bytes of reply buffer */
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void __user *qbuf; /* Pointer to HTTP query string */
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unsigned int qlen; /* Length in bytes of query string buffer */
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};
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#define I2O_EVT_Q_LEN 32
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struct i2o_evt_id {
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unsigned int iop;
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unsigned int tid;
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unsigned int evt_mask;
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};
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/* Event data size = frame size - message header + evt indicator */
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#define I2O_EVT_DATA_SIZE 88
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struct i2o_evt_info {
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struct i2o_evt_id id;
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unsigned char evt_data[I2O_EVT_DATA_SIZE];
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unsigned int data_size;
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};
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struct i2o_evt_get {
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struct i2o_evt_info info;
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int pending;
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int lost;
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};
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typedef struct i2o_sg_io_hdr {
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unsigned int flags; /* see I2O_DPT_SG_IO_FLAGS */
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} i2o_sg_io_hdr_t;
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/**************************************************************************
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* HRT related constants and structures
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**************************************************************************/
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#define I2O_BUS_LOCAL 0
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#define I2O_BUS_ISA 1
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#define I2O_BUS_EISA 2
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/* was I2O_BUS_MCA 3 */
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#define I2O_BUS_PCI 4
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#define I2O_BUS_PCMCIA 5
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#define I2O_BUS_NUBUS 6
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#define I2O_BUS_CARDBUS 7
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#define I2O_BUS_UNKNOWN 0x80
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typedef struct _i2o_pci_bus {
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__u8 PciFunctionNumber;
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__u8 PciDeviceNumber;
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__u8 PciBusNumber;
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__u8 reserved;
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__u16 PciVendorID;
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__u16 PciDeviceID;
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} i2o_pci_bus;
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typedef struct _i2o_local_bus {
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__u16 LbBaseIOPort;
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__u16 reserved;
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__u32 LbBaseMemoryAddress;
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} i2o_local_bus;
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typedef struct _i2o_isa_bus {
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__u16 IsaBaseIOPort;
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__u8 CSN;
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__u8 reserved;
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__u32 IsaBaseMemoryAddress;
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} i2o_isa_bus;
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typedef struct _i2o_eisa_bus_info {
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__u16 EisaBaseIOPort;
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__u8 reserved;
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__u8 EisaSlotNumber;
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__u32 EisaBaseMemoryAddress;
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} i2o_eisa_bus;
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typedef struct _i2o_mca_bus {
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__u16 McaBaseIOPort;
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__u8 reserved;
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__u8 McaSlotNumber;
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__u32 McaBaseMemoryAddress;
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} i2o_mca_bus;
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typedef struct _i2o_other_bus {
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__u16 BaseIOPort;
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__u16 reserved;
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__u32 BaseMemoryAddress;
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} i2o_other_bus;
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typedef struct _i2o_hrt_entry {
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__u32 adapter_id;
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__u32 parent_tid:12;
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__u32 state:4;
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__u32 bus_num:8;
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__u32 bus_type:8;
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union {
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i2o_pci_bus pci_bus;
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i2o_local_bus local_bus;
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i2o_isa_bus isa_bus;
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i2o_eisa_bus eisa_bus;
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i2o_mca_bus mca_bus;
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i2o_other_bus other_bus;
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} bus;
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} i2o_hrt_entry;
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typedef struct _i2o_hrt {
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__u16 num_entries;
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__u8 entry_len;
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__u8 hrt_version;
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__u32 change_ind;
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i2o_hrt_entry hrt_entry[1];
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} i2o_hrt;
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typedef struct _i2o_lct_entry {
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__u32 entry_size:16;
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__u32 tid:12;
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__u32 reserved:4;
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__u32 change_ind;
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__u32 device_flags;
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__u32 class_id:12;
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__u32 version:4;
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__u32 vendor_id:16;
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__u32 sub_class;
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__u32 user_tid:12;
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__u32 parent_tid:12;
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__u32 bios_info:8;
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__u8 identity_tag[8];
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__u32 event_capabilities;
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} i2o_lct_entry;
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typedef struct _i2o_lct {
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__u32 table_size:16;
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__u32 boot_tid:12;
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__u32 lct_ver:4;
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__u32 iop_flags;
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__u32 change_ind;
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i2o_lct_entry lct_entry[1];
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} i2o_lct;
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typedef struct _i2o_status_block {
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__u16 org_id;
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__u16 reserved;
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__u16 iop_id:12;
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__u16 reserved1:4;
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__u16 host_unit_id;
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__u16 segment_number:12;
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__u16 i2o_version:4;
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__u8 iop_state;
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__u8 msg_type;
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__u16 inbound_frame_size;
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__u8 init_code;
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__u8 reserved2;
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__u32 max_inbound_frames;
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__u32 cur_inbound_frames;
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__u32 max_outbound_frames;
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char product_id[24];
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__u32 expected_lct_size;
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__u32 iop_capabilities;
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__u32 desired_mem_size;
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__u32 current_mem_size;
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__u32 current_mem_base;
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__u32 desired_io_size;
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__u32 current_io_size;
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__u32 current_io_base;
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__u32 reserved3:24;
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__u32 cmd_status:8;
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} i2o_status_block;
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/* Event indicator mask flags */
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#define I2O_EVT_IND_STATE_CHANGE 0x80000000
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#define I2O_EVT_IND_GENERAL_WARNING 0x40000000
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#define I2O_EVT_IND_CONFIGURATION_FLAG 0x20000000
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#define I2O_EVT_IND_LOCK_RELEASE 0x10000000
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#define I2O_EVT_IND_CAPABILITY_CHANGE 0x08000000
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#define I2O_EVT_IND_DEVICE_RESET 0x04000000
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#define I2O_EVT_IND_EVT_MASK_MODIFIED 0x02000000
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#define I2O_EVT_IND_FIELD_MODIFIED 0x01000000
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#define I2O_EVT_IND_VENDOR_EVT 0x00800000
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#define I2O_EVT_IND_DEVICE_STATE 0x00400000
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/* Executive event indicitors */
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#define I2O_EVT_IND_EXEC_RESOURCE_LIMITS 0x00000001
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#define I2O_EVT_IND_EXEC_CONNECTION_FAIL 0x00000002
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#define I2O_EVT_IND_EXEC_ADAPTER_FAULT 0x00000004
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#define I2O_EVT_IND_EXEC_POWER_FAIL 0x00000008
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#define I2O_EVT_IND_EXEC_RESET_PENDING 0x00000010
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#define I2O_EVT_IND_EXEC_RESET_IMMINENT 0x00000020
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#define I2O_EVT_IND_EXEC_HW_FAIL 0x00000040
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#define I2O_EVT_IND_EXEC_XCT_CHANGE 0x00000080
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#define I2O_EVT_IND_EXEC_NEW_LCT_ENTRY 0x00000100
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#define I2O_EVT_IND_EXEC_MODIFIED_LCT 0x00000200
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#define I2O_EVT_IND_EXEC_DDM_AVAILABILITY 0x00000400
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/* Random Block Storage Event Indicators */
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#define I2O_EVT_IND_BSA_VOLUME_LOAD 0x00000001
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#define I2O_EVT_IND_BSA_VOLUME_UNLOAD 0x00000002
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#define I2O_EVT_IND_BSA_VOLUME_UNLOAD_REQ 0x00000004
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#define I2O_EVT_IND_BSA_CAPACITY_CHANGE 0x00000008
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#define I2O_EVT_IND_BSA_SCSI_SMART 0x00000010
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/* Event data for generic events */
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#define I2O_EVT_STATE_CHANGE_NORMAL 0x00
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#define I2O_EVT_STATE_CHANGE_SUSPENDED 0x01
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#define I2O_EVT_STATE_CHANGE_RESTART 0x02
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#define I2O_EVT_STATE_CHANGE_NA_RECOVER 0x03
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#define I2O_EVT_STATE_CHANGE_NA_NO_RECOVER 0x04
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#define I2O_EVT_STATE_CHANGE_QUIESCE_REQUEST 0x05
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#define I2O_EVT_STATE_CHANGE_FAILED 0x10
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#define I2O_EVT_STATE_CHANGE_FAULTED 0x11
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#define I2O_EVT_GEN_WARNING_NORMAL 0x00
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#define I2O_EVT_GEN_WARNING_ERROR_THRESHOLD 0x01
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#define I2O_EVT_GEN_WARNING_MEDIA_FAULT 0x02
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#define I2O_EVT_CAPABILITY_OTHER 0x01
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#define I2O_EVT_CAPABILITY_CHANGED 0x02
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#define I2O_EVT_SENSOR_STATE_CHANGED 0x01
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/*
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* I2O classes / subclasses
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*/
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/* Class ID and Code Assignments
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* (LCT.ClassID.Version field)
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*/
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#define I2O_CLASS_VERSION_10 0x00
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#define I2O_CLASS_VERSION_11 0x01
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/* Class code names
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* (from v1.5 Table 6-1 Class Code Assignments.)
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*/
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#define I2O_CLASS_EXECUTIVE 0x000
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#define I2O_CLASS_DDM 0x001
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#define I2O_CLASS_RANDOM_BLOCK_STORAGE 0x010
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#define I2O_CLASS_SEQUENTIAL_STORAGE 0x011
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#define I2O_CLASS_LAN 0x020
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#define I2O_CLASS_WAN 0x030
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#define I2O_CLASS_FIBRE_CHANNEL_PORT 0x040
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#define I2O_CLASS_FIBRE_CHANNEL_PERIPHERAL 0x041
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#define I2O_CLASS_SCSI_PERIPHERAL 0x051
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#define I2O_CLASS_ATE_PORT 0x060
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#define I2O_CLASS_ATE_PERIPHERAL 0x061
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#define I2O_CLASS_FLOPPY_CONTROLLER 0x070
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#define I2O_CLASS_FLOPPY_DEVICE 0x071
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#define I2O_CLASS_BUS_ADAPTER 0x080
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#define I2O_CLASS_PEER_TRANSPORT_AGENT 0x090
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#define I2O_CLASS_PEER_TRANSPORT 0x091
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#define I2O_CLASS_END 0xfff
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/*
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* Rest of 0x092 - 0x09f reserved for peer-to-peer classes
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*/
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#define I2O_CLASS_MATCH_ANYCLASS 0xffffffff
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/*
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* Subclasses
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*/
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#define I2O_SUBCLASS_i960 0x001
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#define I2O_SUBCLASS_HDM 0x020
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#define I2O_SUBCLASS_ISM 0x021
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/* Operation functions */
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#define I2O_PARAMS_FIELD_GET 0x0001
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#define I2O_PARAMS_LIST_GET 0x0002
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#define I2O_PARAMS_MORE_GET 0x0003
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#define I2O_PARAMS_SIZE_GET 0x0004
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#define I2O_PARAMS_TABLE_GET 0x0005
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#define I2O_PARAMS_FIELD_SET 0x0006
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#define I2O_PARAMS_LIST_SET 0x0007
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#define I2O_PARAMS_ROW_ADD 0x0008
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#define I2O_PARAMS_ROW_DELETE 0x0009
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#define I2O_PARAMS_TABLE_CLEAR 0x000A
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/*
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* I2O serial number conventions / formats
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* (circa v1.5)
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*/
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#define I2O_SNFORMAT_UNKNOWN 0
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#define I2O_SNFORMAT_BINARY 1
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#define I2O_SNFORMAT_ASCII 2
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#define I2O_SNFORMAT_UNICODE 3
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#define I2O_SNFORMAT_LAN48_MAC 4
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#define I2O_SNFORMAT_WAN 5
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/*
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* Plus new in v2.0 (Yellowstone pdf doc)
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*/
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#define I2O_SNFORMAT_LAN64_MAC 6
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#define I2O_SNFORMAT_DDM 7
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#define I2O_SNFORMAT_IEEE_REG64 8
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#define I2O_SNFORMAT_IEEE_REG128 9
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#define I2O_SNFORMAT_UNKNOWN2 0xff
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/*
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* I2O Get Status State values
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*/
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#define ADAPTER_STATE_INITIALIZING 0x01
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#define ADAPTER_STATE_RESET 0x02
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#define ADAPTER_STATE_HOLD 0x04
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#define ADAPTER_STATE_READY 0x05
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#define ADAPTER_STATE_OPERATIONAL 0x08
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#define ADAPTER_STATE_FAILED 0x10
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#define ADAPTER_STATE_FAULTED 0x11
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/*
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* Software module types
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*/
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#define I2O_SOFTWARE_MODULE_IRTOS 0x11
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#define I2O_SOFTWARE_MODULE_IOP_PRIVATE 0x22
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#define I2O_SOFTWARE_MODULE_IOP_CONFIG 0x23
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/*
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* Vendors
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*/
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#define I2O_VENDOR_DPT 0x001b
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/*
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* DPT / Adaptec specific values for i2o_sg_io_hdr flags.
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*/
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#define I2O_DPT_SG_FLAG_INTERPRET 0x00010000
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#define I2O_DPT_SG_FLAG_PHYSICAL 0x00020000
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#define I2O_DPT_FLASH_FRAG_SIZE 0x10000
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#define I2O_DPT_FLASH_READ 0x0101
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#define I2O_DPT_FLASH_WRITE 0x0102
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#endif /* _I2O_DEV_H */
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