93a3ddc201
The Atmel AT91 and AVR32 processor architectures share many of the same peripherals. The PDC (Peripheral Data Controller) registers are also implemented within in a number of the on-chip peripherals (eg, USART, MMC, SPI, SSC, etc). In a attempt not to duplicate the register definitions in each peripheral, or in each architecture, the at91_pdc.h header in asm-arm/arch-at91 and asm-avr32/arch-at32ap has been replaced with linux/atmel_pdc.h. The definitions have also been renamed from AT91_PDC_* to ATMEL_PDC_*, and the drivers updated accordingly. Original patch from Nicolas Ferre. Signed-off-by: Andrew Victor <andrew@sanpeople.com> Acked-by: Haavard Skinnemoen <hskinnemoen@atmel.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
36 lines
1.4 KiB
C
36 lines
1.4 KiB
C
/*
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* include/linux/atmel_pdc.h
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*
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* Copyright (C) 2005 Ivan Kokshaysky
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* Copyright (C) SAN People
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*
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* Peripheral Data Controller (PDC) registers.
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* Based on AT91RM9200 datasheet revision E.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#ifndef ATMEL_PDC_H
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#define ATMEL_PDC_H
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#define ATMEL_PDC_RPR 0x100 /* Receive Pointer Register */
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#define ATMEL_PDC_RCR 0x104 /* Receive Counter Register */
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#define ATMEL_PDC_TPR 0x108 /* Transmit Pointer Register */
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#define ATMEL_PDC_TCR 0x10c /* Transmit Counter Register */
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#define ATMEL_PDC_RNPR 0x110 /* Receive Next Pointer Register */
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#define ATMEL_PDC_RNCR 0x114 /* Receive Next Counter Register */
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#define ATMEL_PDC_TNPR 0x118 /* Transmit Next Pointer Register */
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#define ATMEL_PDC_TNCR 0x11c /* Transmit Next Counter Register */
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#define ATMEL_PDC_PTCR 0x120 /* Transfer Control Register */
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#define ATMEL_PDC_RXTEN (1 << 0) /* Receiver Transfer Enable */
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#define ATMEL_PDC_RXTDIS (1 << 1) /* Receiver Transfer Disable */
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#define ATMEL_PDC_TXTEN (1 << 8) /* Transmitter Transfer Enable */
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#define ATMEL_PDC_TXTDIS (1 << 9) /* Transmitter Transfer Disable */
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#define ATMEL_PDC_PTSR 0x124 /* Transfer Status Register */
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#endif
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