Krzysztof Kozlowski f1e9203e23 clk: samsung: Fix Exynos 5420 pinctrl setup and clock disable failure due to domain being gated ... Audio subsystem clocks are located in separate block. On Exynos 5420 if clock for this block (from main clock domain) 'mau_epll' is gated then any read or write to audss registers will block. This kind of boot hang was observed on Arndale Octa and Peach Pi/Pit after introducing runtime PM to pl330 DMA driver. After that commit the 'mau_epll' was gated, because the "amba" clock was disabled and there were no more users of mau_epll. The system hang on one of steps: 1. Disabling unused clocks from audss block. 2. During audss GPIO setup (just before probing i2s0 because samsung_pinmux_setup() tried to access memory from audss block which was gated. Add a workaround for this by enabling the 'mau_epll' clock in probe. Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Acked-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Tested-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Tested-by: Kevin Hilman <khilman@linaro.org> Signed-off-by: Michael Turquette <mturquette@linaro.org>		2014-12-17 07:31:51 -08:00
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clk-exynos-audss.c	clk: samsung: Fix Exynos 5420 pinctrl setup and clock disable failure due to domain being gated	2014-12-17 07:31:51 -08:00
clk-exynos-clkout.c	clk: samsung: Add driver to control CLKOUT line on Exynos SoCs	2014-07-26 02:47:10 +02:00
clk-exynos4.c	clk: samsung: exynos4: set parent of sclk_hdmiphy to hdmi	2014-12-02 16:22:58 +01:00
clk-exynos7.c	clk: samsung: exynos7: add gate clock for ADC block	2014-10-31 10:45:54 +01:00
clk-exynos3250.c	clk: samsung: exynos3250: Register DMC clk provider	2014-09-22 14:28:49 +02:00
clk-exynos4415.c	clk: samsung: exynos4415: Fix build with PM_SLEEP disabled	2014-12-02 16:22:58 +01:00
clk-exynos5250.c	clk: samsung: Make of_device_id array const	2014-07-26 02:49:58 +02:00
clk-exynos5260.c	clk: samsung: Factor out the common code to clk.c	2014-10-31 10:45:45 +01:00
clk-exynos5260.h	clk/exynos5260: add clock file for exynos5260	2014-05-14 19:16:55 +02:00
clk-exynos5410.c	clk: samsung: Register clk provider only after registering its all clocks	2014-06-30 15:07:55 +02:00
clk-exynos5420.c	The clock framework changes for 3.17 are mostly additions of new clock	2014-08-04 11:44:20 -07:00
clk-exynos5440.c	clk: samsung: Make of_device_id array const	2014-07-26 02:49:58 +02:00
clk-pll.c	clk: samsung: add support for 145xx and 1460x PLLs	2014-10-31 10:45:35 +01:00
clk-pll.h	clk: samsung: add support for 145xx and 1460x PLLs	2014-10-31 10:45:35 +01:00
clk-s3c64xx.c	clk: samsung: Register clk provider only after registering its all clocks	2014-06-30 15:07:55 +02:00
clk-s3c2410-dclk.c	clk: Remove .owner field for driver	2014-09-25 17:43:31 -07:00
clk-s3c2410.c	clk: samsung: Register clk provider only after registering its all clocks	2014-06-30 15:07:55 +02:00
clk-s3c2412.c	clk: samsung: register restart handlers for s3c2412 and s3c2443	2014-10-01 14:14:46 +02:00
clk-s3c2443.c	clk: samsung: register restart handlers for s3c2412 and s3c2443	2014-10-01 14:14:46 +02:00
clk-s5pv210-audss.c	clk: samsung: Add S5PV210 Audio Subsystem clock driver	2014-07-19 04:25:08 +09:00
clk-s5pv210.c	clk: samsung: s5pv210: Remove legacy board support	2014-07-19 04:32:19 +09:00
clk.c	clk: samsung: remove unnecessary inclusion of header files from clk.h	2014-12-02 16:21:37 +01:00
clk.h	clk: samsung: remove unnecessary inclusion of header files from clk.h	2014-12-02 16:21:37 +01:00
Kconfig	ARM: S3C24XX: move S3C24XX clock Kconfig options to Samsung clock Kconfig file	2014-05-14 19:41:15 +02:00
Makefile	clk: samsung: add initial clock support for Exynos7 SoC	2014-10-31 10:45:47 +01:00