9a0b5817ad
Implement SMP alternatives, i.e. switching at runtime between different code versions for UP and SMP. The code can patch both SMP->UP and UP->SMP. The UP->SMP case is useful for CPU hotplug. With CONFIG_CPU_HOTPLUG enabled the code switches to UP at boot time and when the number of CPUs goes down to 1, and switches to SMP when the number of CPUs goes up to 2. Without CONFIG_CPU_HOTPLUG or on non-SMP-capable systems the code is patched once at boot time (if needed) and the tables are released afterwards. The changes in detail: * The current alternatives bits are moved to a separate file, the SMP alternatives code is added there. * The patch adds some new elf sections to the kernel: .smp_altinstructions like .altinstructions, also contains a list of alt_instr structs. .smp_altinstr_replacement like .altinstr_replacement, but also has some space to save original instruction before replaving it. .smp_locks list of pointers to lock prefixes which can be nop'ed out on UP. The first two are used to replace more complex instruction sequences such as spinlocks and semaphores. It would be possible to deal with the lock prefixes with that as well, but by handling them as special case the table sizes become much smaller. * The sections are page-aligned and padded up to page size, so they can be free if they are not needed. * Splitted the code to release init pages to a separate function and use it to release the elf sections if they are unused. Signed-off-by: Gerd Hoffmann <kraxel@suse.de> Signed-off-by: Chuck Ebbert <76306.1226@compuserve.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
253 lines
5.8 KiB
C
253 lines
5.8 KiB
C
#ifndef __ARCH_I386_ATOMIC__
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#define __ARCH_I386_ATOMIC__
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#include <linux/config.h>
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#include <linux/compiler.h>
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#include <asm/processor.h>
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/*
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* Atomic operations that C can't guarantee us. Useful for
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* resource counting etc..
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*/
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/*
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* Make sure gcc doesn't try to be clever and move things around
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* on us. We need to use _exactly_ the address the user gave us,
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* not some alias that contains the same information.
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*/
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typedef struct { volatile int counter; } atomic_t;
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#define ATOMIC_INIT(i) { (i) }
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/**
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* atomic_read - read atomic variable
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* @v: pointer of type atomic_t
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*
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* Atomically reads the value of @v.
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*/
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#define atomic_read(v) ((v)->counter)
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/**
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* atomic_set - set atomic variable
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* @v: pointer of type atomic_t
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* @i: required value
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*
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* Atomically sets the value of @v to @i.
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*/
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#define atomic_set(v,i) (((v)->counter) = (i))
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/**
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* atomic_add - add integer to atomic variable
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* @i: integer value to add
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* @v: pointer of type atomic_t
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*
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* Atomically adds @i to @v.
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*/
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static __inline__ void atomic_add(int i, atomic_t *v)
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{
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__asm__ __volatile__(
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LOCK_PREFIX "addl %1,%0"
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:"=m" (v->counter)
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:"ir" (i), "m" (v->counter));
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}
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/**
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* atomic_sub - subtract the atomic variable
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* @i: integer value to subtract
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* @v: pointer of type atomic_t
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*
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* Atomically subtracts @i from @v.
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*/
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static __inline__ void atomic_sub(int i, atomic_t *v)
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{
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__asm__ __volatile__(
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LOCK_PREFIX "subl %1,%0"
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:"=m" (v->counter)
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:"ir" (i), "m" (v->counter));
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}
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/**
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* atomic_sub_and_test - subtract value from variable and test result
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* @i: integer value to subtract
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* @v: pointer of type atomic_t
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*
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* Atomically subtracts @i from @v and returns
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* true if the result is zero, or false for all
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* other cases.
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*/
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static __inline__ int atomic_sub_and_test(int i, atomic_t *v)
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{
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unsigned char c;
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__asm__ __volatile__(
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LOCK_PREFIX "subl %2,%0; sete %1"
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:"=m" (v->counter), "=qm" (c)
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:"ir" (i), "m" (v->counter) : "memory");
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return c;
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}
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/**
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* atomic_inc - increment atomic variable
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* @v: pointer of type atomic_t
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*
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* Atomically increments @v by 1.
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*/
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static __inline__ void atomic_inc(atomic_t *v)
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{
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__asm__ __volatile__(
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LOCK_PREFIX "incl %0"
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:"=m" (v->counter)
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:"m" (v->counter));
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}
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/**
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* atomic_dec - decrement atomic variable
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* @v: pointer of type atomic_t
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*
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* Atomically decrements @v by 1.
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*/
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static __inline__ void atomic_dec(atomic_t *v)
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{
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__asm__ __volatile__(
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LOCK_PREFIX "decl %0"
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:"=m" (v->counter)
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:"m" (v->counter));
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}
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/**
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* atomic_dec_and_test - decrement and test
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* @v: pointer of type atomic_t
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*
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* Atomically decrements @v by 1 and
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* returns true if the result is 0, or false for all other
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* cases.
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*/
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static __inline__ int atomic_dec_and_test(atomic_t *v)
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{
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unsigned char c;
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__asm__ __volatile__(
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LOCK_PREFIX "decl %0; sete %1"
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:"=m" (v->counter), "=qm" (c)
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:"m" (v->counter) : "memory");
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return c != 0;
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}
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/**
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* atomic_inc_and_test - increment and test
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* @v: pointer of type atomic_t
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*
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* Atomically increments @v by 1
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* and returns true if the result is zero, or false for all
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* other cases.
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*/
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static __inline__ int atomic_inc_and_test(atomic_t *v)
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{
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unsigned char c;
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__asm__ __volatile__(
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LOCK_PREFIX "incl %0; sete %1"
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:"=m" (v->counter), "=qm" (c)
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:"m" (v->counter) : "memory");
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return c != 0;
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}
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/**
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* atomic_add_negative - add and test if negative
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* @v: pointer of type atomic_t
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* @i: integer value to add
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*
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* Atomically adds @i to @v and returns true
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* if the result is negative, or false when
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* result is greater than or equal to zero.
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*/
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static __inline__ int atomic_add_negative(int i, atomic_t *v)
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{
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unsigned char c;
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__asm__ __volatile__(
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LOCK_PREFIX "addl %2,%0; sets %1"
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:"=m" (v->counter), "=qm" (c)
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:"ir" (i), "m" (v->counter) : "memory");
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return c;
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}
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/**
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* atomic_add_return - add and return
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* @v: pointer of type atomic_t
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* @i: integer value to add
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*
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* Atomically adds @i to @v and returns @i + @v
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*/
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static __inline__ int atomic_add_return(int i, atomic_t *v)
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{
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int __i;
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#ifdef CONFIG_M386
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if(unlikely(boot_cpu_data.x86==3))
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goto no_xadd;
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#endif
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/* Modern 486+ processor */
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__i = i;
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__asm__ __volatile__(
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LOCK_PREFIX "xaddl %0, %1;"
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:"=r"(i)
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:"m"(v->counter), "0"(i));
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return i + __i;
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#ifdef CONFIG_M386
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no_xadd: /* Legacy 386 processor */
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local_irq_disable();
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__i = atomic_read(v);
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atomic_set(v, i + __i);
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local_irq_enable();
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return i + __i;
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#endif
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}
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static __inline__ int atomic_sub_return(int i, atomic_t *v)
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{
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return atomic_add_return(-i,v);
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}
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#define atomic_cmpxchg(v, old, new) ((int)cmpxchg(&((v)->counter), old, new))
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#define atomic_xchg(v, new) (xchg(&((v)->counter), new))
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/**
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* atomic_add_unless - add unless the number is a given value
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* @v: pointer of type atomic_t
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* @a: the amount to add to v...
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* @u: ...unless v is equal to u.
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*
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* Atomically adds @a to @v, so long as it was not @u.
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* Returns non-zero if @v was not @u, and zero otherwise.
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*/
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#define atomic_add_unless(v, a, u) \
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({ \
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int c, old; \
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c = atomic_read(v); \
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while (c != (u) && (old = atomic_cmpxchg((v), c, c + (a))) != c) \
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c = old; \
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c != (u); \
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})
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#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
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#define atomic_inc_return(v) (atomic_add_return(1,v))
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#define atomic_dec_return(v) (atomic_sub_return(1,v))
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/* These are x86-specific, used by some header files */
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#define atomic_clear_mask(mask, addr) \
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__asm__ __volatile__(LOCK_PREFIX "andl %0,%1" \
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: : "r" (~(mask)),"m" (*addr) : "memory")
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#define atomic_set_mask(mask, addr) \
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__asm__ __volatile__(LOCK_PREFIX "orl %0,%1" \
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: : "r" (mask),"m" (*(addr)) : "memory")
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/* Atomic operations are already serializing on x86 */
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#define smp_mb__before_atomic_dec() barrier()
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#define smp_mb__after_atomic_dec() barrier()
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#define smp_mb__before_atomic_inc() barrier()
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#define smp_mb__after_atomic_inc() barrier()
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#include <asm-generic/atomic.h>
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#endif
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