476 lines
15 KiB
Text
476 lines
15 KiB
Text
$NetBSD: patch-ba,v 1.1 2003/07/31 15:13:39 bencollver Exp $
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--- src/lrmi.c.orig Mon Aug 7 00:17:23 2000
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+++ src/lrmi.c
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@@ -12,10 +12,14 @@ This software has NO WARRANTY. Use it a
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#include <stdio.h>
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#include <string.h>
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-#include <asm/vm86.h>
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#ifdef USE_LIBC_VM86
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-#include <sys/vm86.h>
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+#include <sys/types.h>
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+#include <signal.h>
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+#include <machine/psl.h>
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+#include <machine/segments.h>
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+#include <machine/sysarch.h>
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+#include <machine/vm86.h>
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#endif
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#include <sys/types.h>
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@@ -30,7 +34,7 @@ This software has NO WARRANTY. Use it a
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#define REAL_MEM_SIZE 0x10000
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#define REAL_MEM_BLOCKS 0x100
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-int __svgalib_lrmi_cpu_type=CPU_386;
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+int __svgalib_lrmi_cpu_type=VCPU_386;
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struct mem_block
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{
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@@ -171,7 +175,7 @@ LRMI_free_real(void *m)
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}
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-#define DEFAULT_VM86_FLAGS (IF_MASK | IOPL_MASK)
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+#define DEFAULT_VM86_FLAGS (PSL_I|PSL_IOPL)
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#define DEFAULT_STACK_SIZE 0x1000
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#define RETURN_TO_32_INT 255
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@@ -210,9 +214,9 @@ get_int_off(int i)
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static inline void
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pushw(unsigned short i)
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{
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- struct vm86_regs *r = &context.vm.regs;
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- r->esp -= 2;
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- *(unsigned short *)(((unsigned int)r->ss << 4) + r->esp) = i;
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+ struct vm86_regs *r = &context.vm.substr.regs;
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+ r->vmsc.sc_esp -= 2;
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+ *(unsigned short *)(((unsigned int)r->vmsc.sc_ss << 4) + r->vmsc.sc_esp) = i;
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}
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@@ -282,13 +286,13 @@ LRMI_init(void)
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memset(&context.vm, 0, sizeof(context.vm));
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- context.vm.cpu_type = __svgalib_lrmi_cpu_type;
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+ context.vm.substr.ss_cpu_type = __svgalib_lrmi_cpu_type;
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/*
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Enable kernel emulation of all ints except RETURN_TO_32_INT
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*/
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- memset(&context.vm.int_revectored, 0, sizeof(context.vm.int_revectored));
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- set_bit(RETURN_TO_32_INT, &context.vm.int_revectored);
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+ memset(&context.vm.int_byuser, 0, sizeof(context.vm.int_byuser));
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+ set_bit(RETURN_TO_32_INT, &context.vm.int_byuser);
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context.ready = 1;
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@@ -299,36 +303,36 @@ LRMI_init(void)
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static void
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set_regs(struct LRMI_regs *r)
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{
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- context.vm.regs.edi = r->edi;
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- context.vm.regs.esi = r->esi;
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- context.vm.regs.ebp = r->ebp;
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- context.vm.regs.ebx = r->ebx;
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- context.vm.regs.edx = r->edx;
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- context.vm.regs.ecx = r->ecx;
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- context.vm.regs.eax = r->eax;
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- context.vm.regs.eflags = DEFAULT_VM86_FLAGS;
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- context.vm.regs.es = r->es;
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- context.vm.regs.ds = r->ds;
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- context.vm.regs.fs = r->fs;
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- context.vm.regs.gs = r->gs;
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+ context.vm.substr.regs.vmsc.sc_edi = r->edi;
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+ context.vm.substr.regs.vmsc.sc_esi = r->esi;
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+ context.vm.substr.regs.vmsc.sc_ebp = r->ebp;
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+ context.vm.substr.regs.vmsc.sc_ebx = r->ebx;
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+ context.vm.substr.regs.vmsc.sc_edx = r->edx;
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+ context.vm.substr.regs.vmsc.sc_ecx = r->ecx;
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+ context.vm.substr.regs.vmsc.sc_eax = r->eax;
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+ context.vm.substr.regs.vmsc.sc_eflags = DEFAULT_VM86_FLAGS;
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+ context.vm.substr.regs.vmsc.sc_es = r->es;
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+ context.vm.substr.regs.vmsc.sc_ds = r->ds;
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+ context.vm.substr.regs.vmsc.sc_fs = r->fs;
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+ context.vm.substr.regs.vmsc.sc_gs = r->gs;
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}
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static void
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get_regs(struct LRMI_regs *r)
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{
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- r->edi = context.vm.regs.edi;
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- r->esi = context.vm.regs.esi;
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- r->ebp = context.vm.regs.ebp;
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- r->ebx = context.vm.regs.ebx;
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- r->edx = context.vm.regs.edx;
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- r->ecx = context.vm.regs.ecx;
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- r->eax = context.vm.regs.eax;
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- r->flags = context.vm.regs.eflags;
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- r->es = context.vm.regs.es;
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- r->ds = context.vm.regs.ds;
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- r->fs = context.vm.regs.fs;
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- r->gs = context.vm.regs.gs;
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+ r->edi = context.vm.substr.regs.vmsc.sc_edi;
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+ r->esi = context.vm.substr.regs.vmsc.sc_esi;
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+ r->ebp = context.vm.substr.regs.vmsc.sc_ebp;
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+ r->ebx = context.vm.substr.regs.vmsc.sc_ebx;
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+ r->edx = context.vm.substr.regs.vmsc.sc_edx;
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+ r->ecx = context.vm.substr.regs.vmsc.sc_ecx;
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+ r->eax = context.vm.substr.regs.vmsc.sc_eax;
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+ r->flags = context.vm.substr.regs.vmsc.sc_eflags;
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+ r->es = context.vm.substr.regs.vmsc.sc_es;
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+ r->ds = context.vm.substr.regs.vmsc.sc_ds;
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+ r->fs = context.vm.substr.regs.vmsc.sc_fs;
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+ r->gs = context.vm.substr.regs.vmsc.sc_gs;
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}
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#define DIRECTION_FLAG (1 << 10)
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@@ -338,11 +342,11 @@ em_ins(int size)
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{
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unsigned int edx, edi;
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- edx = context.vm.regs.edx & 0xffff;
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- edi = context.vm.regs.edi & 0xffff;
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- edi += (unsigned int)context.vm.regs.ds << 4;
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+ edx = context.vm.substr.regs.vmsc.sc_edx & 0xffff;
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+ edi = context.vm.substr.regs.vmsc.sc_edi & 0xffff;
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+ edi += (unsigned int)context.vm.substr.regs.vmsc.sc_ds << 4;
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- if (context.vm.regs.eflags & DIRECTION_FLAG)
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+ if (context.vm.substr.regs.vmsc.sc_eflags & DIRECTION_FLAG)
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{
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if (size == 4)
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asm volatile ("std; insl; cld"
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@@ -367,10 +371,10 @@ em_ins(int size)
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: "=D" (edi) : "d" (edx), "0" (edi));
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}
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- edi -= (unsigned int)context.vm.regs.ds << 4;
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+ edi -= (unsigned int)context.vm.substr.regs.vmsc.sc_ds << 4;
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- context.vm.regs.edi &= 0xffff0000;
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- context.vm.regs.edi |= edi & 0xffff;
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+ context.vm.substr.regs.vmsc.sc_edi &= 0xffff0000;
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+ context.vm.substr.regs.vmsc.sc_edi |= edi & 0xffff;
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}
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static void
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@@ -378,12 +382,12 @@ em_rep_ins(int size)
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{
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unsigned int ecx, edx, edi;
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- ecx = context.vm.regs.ecx & 0xffff;
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- edx = context.vm.regs.edx & 0xffff;
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- edi = context.vm.regs.edi & 0xffff;
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- edi += (unsigned int)context.vm.regs.ds << 4;
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+ ecx = context.vm.substr.regs.vmsc.sc_ecx & 0xffff;
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+ edx = context.vm.substr.regs.vmsc.sc_edx & 0xffff;
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+ edi = context.vm.substr.regs.vmsc.sc_edi & 0xffff;
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+ edi += (unsigned int)context.vm.substr.regs.vmsc.sc_ds << 4;
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- if (context.vm.regs.eflags & DIRECTION_FLAG)
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+ if (context.vm.substr.regs.vmsc.sc_eflags & DIRECTION_FLAG)
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{
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if (size == 4)
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asm volatile ("std; rep; insl; cld"
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@@ -414,13 +418,13 @@ em_rep_ins(int size)
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: "d" (edx), "0" (edi), "1" (ecx));
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}
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- edi -= (unsigned int)context.vm.regs.ds << 4;
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+ edi -= (unsigned int)context.vm.substr.regs.vmsc.sc_ds << 4;
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- context.vm.regs.edi &= 0xffff0000;
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- context.vm.regs.edi |= edi & 0xffff;
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+ context.vm.substr.regs.vmsc.sc_edi &= 0xffff0000;
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+ context.vm.substr.regs.vmsc.sc_edi |= edi & 0xffff;
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- context.vm.regs.ecx &= 0xffff0000;
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- context.vm.regs.ecx |= ecx & 0xffff;
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+ context.vm.substr.regs.vmsc.sc_ecx &= 0xffff0000;
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+ context.vm.substr.regs.vmsc.sc_ecx |= ecx & 0xffff;
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}
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static void
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@@ -428,11 +432,11 @@ em_outs(int size)
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{
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unsigned int edx, esi;
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- edx = context.vm.regs.edx & 0xffff;
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- esi = context.vm.regs.esi & 0xffff;
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- esi += (unsigned int)context.vm.regs.ds << 4;
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+ edx = context.vm.substr.regs.vmsc.sc_edx & 0xffff;
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+ esi = context.vm.substr.regs.vmsc.sc_esi & 0xffff;
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+ esi += (unsigned int)context.vm.substr.regs.vmsc.sc_ds << 4;
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- if (context.vm.regs.eflags & DIRECTION_FLAG)
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+ if (context.vm.substr.regs.vmsc.sc_eflags & DIRECTION_FLAG)
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{
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if (size == 4)
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asm volatile ("std; outsl; cld"
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@@ -457,10 +461,10 @@ em_outs(int size)
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: "=S" (esi) : "d" (edx), "0" (esi));
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}
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- esi -= (unsigned int)context.vm.regs.ds << 4;
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+ esi -= (unsigned int)context.vm.substr.regs.vmsc.sc_ds << 4;
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- context.vm.regs.esi &= 0xffff0000;
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- context.vm.regs.esi |= esi & 0xffff;
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+ context.vm.substr.regs.vmsc.sc_esi &= 0xffff0000;
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+ context.vm.substr.regs.vmsc.sc_esi |= esi & 0xffff;
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}
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static void
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@@ -468,12 +472,12 @@ em_rep_outs(int size)
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{
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unsigned int ecx, edx, esi;
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- ecx = context.vm.regs.ecx & 0xffff;
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- edx = context.vm.regs.edx & 0xffff;
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- esi = context.vm.regs.esi & 0xffff;
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- esi += (unsigned int)context.vm.regs.ds << 4;
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+ ecx = context.vm.substr.regs.vmsc.sc_ecx & 0xffff;
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+ edx = context.vm.substr.regs.vmsc.sc_edx & 0xffff;
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+ esi = context.vm.substr.regs.vmsc.sc_esi & 0xffff;
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+ esi += (unsigned int)context.vm.substr.regs.vmsc.sc_ds << 4;
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- if (context.vm.regs.eflags & DIRECTION_FLAG)
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+ if (context.vm.substr.regs.vmsc.sc_eflags & DIRECTION_FLAG)
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{
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if (size == 4)
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asm volatile ("std; rep; outsl; cld"
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@@ -504,61 +508,61 @@ em_rep_outs(int size)
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: "d" (edx), "0" (esi), "1" (ecx));
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}
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- esi -= (unsigned int)context.vm.regs.ds << 4;
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+ esi -= (unsigned int)context.vm.substr.regs.vmsc.sc_ds << 4;
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- context.vm.regs.esi &= 0xffff0000;
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- context.vm.regs.esi |= esi & 0xffff;
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+ context.vm.substr.regs.vmsc.sc_esi &= 0xffff0000;
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+ context.vm.substr.regs.vmsc.sc_esi |= esi & 0xffff;
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- context.vm.regs.ecx &= 0xffff0000;
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- context.vm.regs.ecx |= ecx & 0xffff;
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+ context.vm.substr.regs.vmsc.sc_ecx &= 0xffff0000;
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+ context.vm.substr.regs.vmsc.sc_ecx |= ecx & 0xffff;
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}
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static void
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em_inb(void)
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{
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asm volatile ("inb (%w1), %b0"
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- : "=a" (context.vm.regs.eax)
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- : "d" (context.vm.regs.edx), "0" (context.vm.regs.eax));
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+ : "=a" (context.vm.substr.regs.vmsc.sc_eax)
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+ : "d" (context.vm.substr.regs.vmsc.sc_edx), "0" (context.vm.substr.regs.vmsc.sc_eax));
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}
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static void
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em_inw(void)
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{
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asm volatile ("inw (%w1), %w0"
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- : "=a" (context.vm.regs.eax)
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- : "d" (context.vm.regs.edx), "0" (context.vm.regs.eax));
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+ : "=a" (context.vm.substr.regs.vmsc.sc_eax)
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+ : "d" (context.vm.substr.regs.vmsc.sc_edx), "0" (context.vm.substr.regs.vmsc.sc_eax));
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}
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static void
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em_inl(void)
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{
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asm volatile ("inl (%w1), %0"
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- : "=a" (context.vm.regs.eax)
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- : "d" (context.vm.regs.edx));
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+ : "=a" (context.vm.substr.regs.vmsc.sc_eax)
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+ : "d" (context.vm.substr.regs.vmsc.sc_edx));
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}
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static void
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em_outb(void)
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{
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asm volatile ("outb %b0, (%w1)"
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- : : "a" (context.vm.regs.eax),
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- "d" (context.vm.regs.edx));
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+ : : "a" (context.vm.substr.regs.vmsc.sc_eax),
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+ "d" (context.vm.substr.regs.vmsc.sc_edx));
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}
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static void
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em_outw(void)
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{
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asm volatile ("outw %w0, (%w1)"
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- : : "a" (context.vm.regs.eax),
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- "d" (context.vm.regs.edx));
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+ : : "a" (context.vm.substr.regs.vmsc.sc_eax),
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+ "d" (context.vm.substr.regs.vmsc.sc_edx));
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}
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static void
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em_outl(void)
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{
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asm volatile ("outl %0, (%w1)"
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- : : "a" (context.vm.regs.eax),
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- "d" (context.vm.regs.edx));
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+ : : "a" (context.vm.substr.regs.vmsc.sc_eax),
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+ "d" (context.vm.substr.regs.vmsc.sc_edx));
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}
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static int
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@@ -572,8 +576,8 @@ emulate(void)
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} prefix = { 0, 0 };
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int i = 0;
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- insn = (unsigned char *)((unsigned int)context.vm.regs.cs << 4);
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- insn += context.vm.regs.eip;
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+ insn = (unsigned char *)((unsigned int)context.vm.substr.regs.vmsc.sc_cs << 4);
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+ insn += context.vm.substr.regs.vmsc.sc_eip;
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while (1)
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{
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@@ -687,7 +691,7 @@ emulate(void)
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return 0;
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}
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- context.vm.regs.eip += i;
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+ context.vm.substr.regs.vmsc.sc_eip += i;
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return 1;
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}
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@@ -723,7 +727,7 @@ lrmi_vm86(struct vm86_struct *vm)
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return r;
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}
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#else
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-#define lrmi_vm86 vm86
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+#define lrmi_vm86 i386_vm86
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#endif
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@@ -735,26 +739,26 @@ debug_info(int vret)
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fputs("vm86() failed\n", stderr);
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fprintf(stderr, "return = 0x%x\n", vret);
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- fprintf(stderr, "eax = 0x%08lx\n", context.vm.regs.eax);
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- fprintf(stderr, "ebx = 0x%08lx\n", context.vm.regs.ebx);
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- fprintf(stderr, "ecx = 0x%08lx\n", context.vm.regs.ecx);
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- fprintf(stderr, "edx = 0x%08lx\n", context.vm.regs.edx);
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- fprintf(stderr, "esi = 0x%08lx\n", context.vm.regs.esi);
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- fprintf(stderr, "edi = 0x%08lx\n", context.vm.regs.edi);
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- fprintf(stderr, "ebp = 0x%08lx\n", context.vm.regs.ebp);
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- fprintf(stderr, "eip = 0x%08lx\n", context.vm.regs.eip);
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- fprintf(stderr, "cs = 0x%04x\n", context.vm.regs.cs);
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- fprintf(stderr, "esp = 0x%08lx\n", context.vm.regs.esp);
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- fprintf(stderr, "ss = 0x%04x\n", context.vm.regs.ss);
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- fprintf(stderr, "ds = 0x%04x\n", context.vm.regs.ds);
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- fprintf(stderr, "es = 0x%04x\n", context.vm.regs.es);
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- fprintf(stderr, "fs = 0x%04x\n", context.vm.regs.fs);
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- fprintf(stderr, "gs = 0x%04x\n", context.vm.regs.gs);
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- fprintf(stderr, "eflags = 0x%08lx\n", context.vm.regs.eflags);
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+ fprintf(stderr, "eax = 0x%08lx\n", context.vm.substr.regs.vmsc.sc_eax);
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+ fprintf(stderr, "ebx = 0x%08lx\n", context.vm.substr.regs.vmsc.sc_ebx);
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+ fprintf(stderr, "ecx = 0x%08lx\n", context.vm.substr.regs.vmsc.sc_ecx);
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+ fprintf(stderr, "edx = 0x%08lx\n", context.vm.substr.regs.vmsc.sc_edx);
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+ fprintf(stderr, "esi = 0x%08lx\n", context.vm.substr.regs.vmsc.sc_esi);
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+ fprintf(stderr, "edi = 0x%08lx\n", context.vm.substr.regs.vmsc.sc_edi);
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+ fprintf(stderr, "ebp = 0x%08lx\n", context.vm.substr.regs.vmsc.sc_ebp);
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+ fprintf(stderr, "eip = 0x%08lx\n", context.vm.substr.regs.vmsc.sc_eip);
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+ fprintf(stderr, "cs = 0x%04x\n", context.vm.substr.regs.vmsc.sc_cs);
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+ fprintf(stderr, "esp = 0x%08lx\n", context.vm.substr.regs.vmsc.sc_esp);
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+ fprintf(stderr, "ss = 0x%04x\n", context.vm.substr.regs.vmsc.sc_ss);
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+ fprintf(stderr, "ds = 0x%04x\n", context.vm.substr.regs.vmsc.sc_ds);
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+ fprintf(stderr, "es = 0x%04x\n", context.vm.substr.regs.vmsc.sc_es);
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+ fprintf(stderr, "fs = 0x%04x\n", context.vm.substr.regs.vmsc.sc_fs);
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+ fprintf(stderr, "gs = 0x%04x\n", context.vm.substr.regs.vmsc.sc_gs);
|
|
+ fprintf(stderr, "eflags = 0x%08lx\n", context.vm.substr.regs.vmsc.sc_eflags);
|
|
|
|
fputs("cs:ip = [ ", stderr);
|
|
|
|
- p = (unsigned char *)((context.vm.regs.cs << 4) + (context.vm.regs.eip & 0xffff));
|
|
+ p = (unsigned char *)((context.vm.substr.regs.vmsc.sc_cs << 4) + (context.vm.substr.regs.vmsc.sc_eip & 0xffff));
|
|
|
|
for (i = 0; i < 16; ++i)
|
|
fprintf(stderr, "%02x ", (unsigned int)p[i]);
|
|
@@ -779,13 +783,13 @@ run_vm86(void)
|
|
if (v == RETURN_TO_32_INT)
|
|
return 1;
|
|
|
|
- pushw(context.vm.regs.eflags);
|
|
- pushw(context.vm.regs.cs);
|
|
- pushw(context.vm.regs.eip);
|
|
-
|
|
- context.vm.regs.cs = get_int_seg(v);
|
|
- context.vm.regs.eip = get_int_off(v);
|
|
- context.vm.regs.eflags &= ~(VIF_MASK | TF_MASK);
|
|
+ pushw(context.vm.substr.regs.vmsc.sc_eflags);
|
|
+ pushw(context.vm.substr.regs.vmsc.sc_cs);
|
|
+ pushw(context.vm.substr.regs.vmsc.sc_eip);
|
|
+
|
|
+ context.vm.substr.regs.vmsc.sc_cs = get_int_seg(v);
|
|
+ context.vm.substr.regs.vmsc.sc_eip = get_int_off(v);
|
|
+ context.vm.substr.regs.vmsc.sc_eflags &= ~(PSL_VIF | PSL_T);
|
|
|
|
continue;
|
|
}
|
|
@@ -808,22 +812,20 @@ LRMI_call(struct LRMI_regs *r)
|
|
{
|
|
unsigned int vret;
|
|
|
|
- memset(&context.vm.regs, 0, sizeof(context.vm.regs));
|
|
-
|
|
set_regs(r);
|
|
|
|
- context.vm.regs.cs = r->cs;
|
|
- context.vm.regs.eip = r->ip;
|
|
+ context.vm.substr.regs.vmsc.sc_cs = r->cs;
|
|
+ context.vm.substr.regs.vmsc.sc_eip = r->ip;
|
|
|
|
if (r->ss == 0 && r->sp == 0)
|
|
{
|
|
- context.vm.regs.ss = context.stack_seg;
|
|
- context.vm.regs.esp = context.stack_off;
|
|
+ context.vm.substr.regs.vmsc.sc_ss = context.stack_seg;
|
|
+ context.vm.substr.regs.vmsc.sc_esp = context.stack_off;
|
|
}
|
|
else
|
|
{
|
|
- context.vm.regs.ss = r->ss;
|
|
- context.vm.regs.esp = r->sp;
|
|
+ context.vm.substr.regs.vmsc.sc_ss = r->ss;
|
|
+ context.vm.substr.regs.vmsc.sc_esp = r->sp;
|
|
}
|
|
|
|
pushw(context.ret_seg);
|
|
@@ -856,22 +858,20 @@ LRMI_int(int i, struct LRMI_regs *r)
|
|
return 0;
|
|
}
|
|
|
|
- memset(&context.vm.regs, 0, sizeof(context.vm.regs));
|
|
-
|
|
set_regs(r);
|
|
|
|
- context.vm.regs.cs = seg;
|
|
- context.vm.regs.eip = off;
|
|
+ context.vm.substr.regs.vmsc.sc_cs = seg;
|
|
+ context.vm.substr.regs.vmsc.sc_eip = off;
|
|
|
|
if (r->ss == 0 && r->sp == 0)
|
|
{
|
|
- context.vm.regs.ss = context.stack_seg;
|
|
- context.vm.regs.esp = context.stack_off;
|
|
+ context.vm.substr.regs.vmsc.sc_ss = context.stack_seg;
|
|
+ context.vm.substr.regs.vmsc.sc_esp = context.stack_off;
|
|
}
|
|
else
|
|
{
|
|
- context.vm.regs.ss = r->ss;
|
|
- context.vm.regs.esp = r->sp;
|
|
+ context.vm.substr.regs.vmsc.sc_ss = r->ss;
|
|
+ context.vm.substr.regs.vmsc.sc_esp = r->sp;
|
|
}
|
|
|
|
pushw(DEFAULT_VM86_FLAGS);
|