kpriv/pkgsrc
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity
pkgsrc/emulators/swarm/distinfo

17 lines
884 B
Text
Raw Normal View History

Fix build on SunOS. Use correct header for endianness definitions and add a getpt() function.
2012-03-07 16:08:40 +01:00
$NetBSD: distinfo,v 1.10 2012/03/07 15:08:40 hans Exp $
+ move the distfile digest/checksum value from files/md5 to distinfo + move the patch digest/checksum values from files/patch-sum to distinfo
2001-04-17 12:57:56 +02:00
Update swarm from 0.57 to 0.61. Swarm now emulates an ARM 7M core. Changes since previous version: #00061 michael pp Michael Dales (michael@dcs.gla.ac.uk) Thu Sep 27 10:41:39 BST 2001 ------------------------------------------------------------------------------------ * Contains lots of code by Hanish Menon [www.hanishkvc.com] to enable uCLinux to work on SWARM. * Updated the logic in armproc.cpp wrt UART and LCD Ctrls so that they can rise interrupts to the Interrupt Ctrl if required. * Updated certain messages and return values. * Added the srec loader * Updated the LCD controller address * ReIntroduced the Parse_Opts logic. * Will be adding support for SREC file loading. * Fixed a problem in the bin/Makefile * Added support for a minimal UART controller. * Updated the earlier sample LCD controller which I had written wrt its Addr. * Looking into SWARM and the Device/Pheriperal interface logic in SWARM * Added a partial LCD Ctrl logic to test the interface logic * fix a problem with ldms #00060 michael pp Michael Dales (michael@dcs.gla.ac.uk) Tue May 15 22:53:15 BST 2001 ------------------------------------------------------------------------------------ Added cache invalivation functions to the system coprocessor. #00059 michael pp Michael Dales (michael@dcs.gla.ac.uk) Fri May 11 16:52:45 BST 2001 ------------------------------------------------------------------------------------ Corrected the n-way set associative cache. Added functionality to the system co-processor to allow me to read the cycle counter, cache hit counter, and cache miss counter in an application, using register 11 with opcode 2 set to 0, 1, and 2 respectively. #00058 michael pp Michael Dales (michael@dcs.gla.ac.uk) Thu May 10 14:05:25 BST 2001 ------------------------------------------------------------------------------------ Added a n-way set associative cache. Default is now 8k 4-way shared cache.
2003-08-14 11:31:39 +02:00
SHA1 (swarm-0.61.tar.gz) = 36ed52671f8be2cf8e799efd94a48b2919979d2c
Add RMD160 digests to the SHA1 ones
2005-02-23 19:49:17 +01:00
RMD160 (swarm-0.61.tar.gz) = d8e15da178236a46761a65cd52809276df5f3511
Update swarm from 0.57 to 0.61. Swarm now emulates an ARM 7M core. Changes since previous version: #00061 michael pp Michael Dales (michael@dcs.gla.ac.uk) Thu Sep 27 10:41:39 BST 2001 ------------------------------------------------------------------------------------ * Contains lots of code by Hanish Menon [www.hanishkvc.com] to enable uCLinux to work on SWARM. * Updated the logic in armproc.cpp wrt UART and LCD Ctrls so that they can rise interrupts to the Interrupt Ctrl if required. * Updated certain messages and return values. * Added the srec loader * Updated the LCD controller address * ReIntroduced the Parse_Opts logic. * Will be adding support for SREC file loading. * Fixed a problem in the bin/Makefile * Added support for a minimal UART controller. * Updated the earlier sample LCD controller which I had written wrt its Addr. * Looking into SWARM and the Device/Pheriperal interface logic in SWARM * Added a partial LCD Ctrl logic to test the interface logic * fix a problem with ldms #00060 michael pp Michael Dales (michael@dcs.gla.ac.uk) Tue May 15 22:53:15 BST 2001 ------------------------------------------------------------------------------------ Added cache invalivation functions to the system coprocessor. #00059 michael pp Michael Dales (michael@dcs.gla.ac.uk) Fri May 11 16:52:45 BST 2001 ------------------------------------------------------------------------------------ Corrected the n-way set associative cache. Added functionality to the system co-processor to allow me to read the cycle counter, cache hit counter, and cache miss counter in an application, using register 11 with opcode 2 set to 0, 1, and 2 respectively. #00058 michael pp Michael Dales (michael@dcs.gla.ac.uk) Thu May 10 14:05:25 BST 2001 ------------------------------------------------------------------------------------ Added a n-way set associative cache. Default is now 8k 4-way shared cache.
2003-08-14 11:31:39 +02:00
Size (swarm-0.61.tar.gz) = 395061 bytes
Fix build on SunOS. Use correct header for endianness definitions and add a getpt() function.
2012-03-07 16:08:40 +01:00
SHA1 (patch-aa) = 58aaf4fc9a39f14a8083ef8cc534b0199a757360
Fixed wrong use of WRKSRC.
2005-11-03 22:51:57 +01:00
SHA1 (patch-ab) = 5a71a670297e4d8db2dd3c7c96d9528f878d13cb
SHA1 (patch-ac) = 20b0603e24178a6086531bd2f7eb0eb5fc0e99c3
Fix build on SunOS. Use correct header for endianness definitions and add a getpt() function.
2012-03-07 16:08:40 +01:00
SHA1 (patch-ad) = 6d328a265f9e2f7774e759d01a920a81e1bceeb8
Fixed wrong use of WRKSRC.
2005-11-03 22:51:57 +01:00
SHA1 (patch-ae) = 08b8819ad53bb0a91c3ab7a56479b2f36faab754
SHA1 (patch-af) = 8228c591fd22ee8984d1f434940ad2cbbba41a22
SHA1 (patch-ag) = 4d3ca9cd45edc081b85019ec88135504b3e7b0a1
SHA1 (patch-ah) = 94d58bdd8d48e73f49ef06ac90eb0a9b0e1af6db
SHA1 (patch-ai) = 51b43a6b560566447d588623b19d3da6ab7b4ade
SHA1 (patch-aj) = 227b459e8201320679d3484daa163a5a5c579b17
Add DragonFly support.
2005-12-09 13:10:09 +01:00
SHA1 (patch-ak) = b5fe118ed1da57ba528c3f3e86790ff33b7a2533
Reference in a new issue Copy permalink