pkgsrc/cad/veriwell/Makefile

19 lines
424 B
Makefile
Raw Normal View History

# $NetBSD: Makefile,v 1.1 2016/10/09 13:14:06 kamil Exp $
DISTNAME= veriwell-2.8.7
CATEGORIES= cad
MASTER_SITES= ${MASTER_SITE_SOURCEFORGE:=veriwell/}
MAINTAINER= pkgsrc-users@NetBSD.org
HOMEPAGE= https://sourceforge.net/projects/veriwell/
COMMENT= Verilog Simulator
LICENSE= gnu-gpl-v2
GNU_CONFIGURE= yes
USE_LANGUAGES= c c++
TEST_TARGET= check
.include "../../devel/zlib/buildlink3.mk"
.include "../../mk/bsd.pkg.mk"