fix cats kernel:

TODO: see cpu_arm_instr_dpi; non-zero steps but still under 256 is not implemented yet
to_be_translated(): TODO: unimplemented instruction:
ebf61a60:  e28fc600     add     ip,pc,#0
This commit is contained in:
christos 2017-05-11 12:38:30 +00:00
parent 1ada8d38c6
commit 0f2cdee7ea

View file

@ -1,11 +1,12 @@
$NetBSD: patch-ag,v 1.3 2014/12/08 20:55:19 ryoon Exp $
$NetBSD: patch-ag,v 1.4 2017/05/11 12:38:30 christos Exp $
enable all CPSR->SPSR copy values, instead of hard coding 3 out of 15.
- enable all CPSR->SPSR copy values, instead of hard coding 3 out of 15.
- allow immediate to be zero with a non-zero shift. caused by:
ebf61a60: e28fc600 add ip,pc,#0
--- src/cpus/cpu_arm_instr.cc.orig 2014-08-17 08:45:15.000000000 +0000
+++ src/cpus/cpu_arm_instr.cc
@@ -2670,6 +2670,7 @@ X(to_be_translated)
--- src/cpus/cpu_arm_instr.cc.orig 2014-08-17 04:45:15.000000000 -0400
+++ src/cpus/cpu_arm_instr.cc 2017-05-11 08:36:16.634585212 -0400
@@ -2670,6 +2670,7 @@
ic->f = cond_instr(bx);
}
ic->arg[0] = (size_t)(&cpu->cd.arm.r[rm]);
@ -13,3 +14,12 @@ enable all CPSR->SPSR copy values, instead of hard coding 3 out of 15.
break;
}
if ((iword & 0x0fb00ff0) == 0x1000090) {
@@ -2888,7 +2889,7 @@
while (r8-- > 0)
imm = (imm >> 2) | ((imm & 3) << 30);
- if (steps != 0 && imm < 256) {
+ if (steps != 0 && imm < 256 && imm != 0) {
if (!cpu->translation_readahead)
fatal("TODO: see cpu_arm_instr_dpi; non-zero steps but still under 256 is not implemented yet\n");
goto bad;