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On request create a new target called mipssim-virtio that has the extension

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leaving the original target in tact.
This commit is contained in:
reinoud 2021-02-17 17:16:00 +00:00
parent e375725960
commit 6377a70886
7 changed files with 170 additions and 66 deletions
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5
emulators/qemu/Makefile
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@ -1,7 +1,7 @@
# $NetBSD: Makefile,v 1.261 2021/02/15 22:15:12 reinoud Exp $
# $NetBSD: Makefile,v 1.262 2021/02/17 17:16:00 reinoud Exp $
DISTNAME= qemu-5.1.0
PKGREVISION= 12
PKGREVISION= 13
CATEGORIES= emulators
MASTER_SITES= https://download.qemu.org/
EXTRACT_SUFX= .tar.xz
@ -144,6 +144,7 @@ TEST_TARGET= check
post-extract:
cp ${WRKDIR}/palcode-clipper ${WRKSRC}/pc-bios/palcode-clipper
cp ${FILESDIR}/hw-mips-mipssim_virtio.c ${WRKSRC}/hw/mips/mipssim_virtio.c
# Some dependencies aren't correct and this tries to be re-made on install,
# failing due to configure bugs.

8
emulators/qemu/distinfo
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@ -1,4 +1,4 @@
$NetBSD: distinfo,v 1.168 2021/02/15 22:15:12 reinoud Exp $
$NetBSD: distinfo,v 1.169 2021/02/17 17:16:00 reinoud Exp $
SHA1 (palcode-clipper) = e25ae10a10e0801e47b62b9ee2d10c8ccb4ee940
RMD160 (palcode-clipper) = a637f1cc38dabfdff36e3f02b6dd02d7c63cb8db
@ -16,8 +16,10 @@ SHA1 (patch-capstone_Makefile) = f59870031de8c4385a591362749ec82f57fd4c27
SHA1 (patch-configure) = 2f5689b83b58066865598a83d53be2de6b42e303
SHA1 (patch-contrib_ivshmem-client_ivshmem-client.c) = 40c8751607cbf66a37e4c4e08f2664b864e2e984
SHA1 (patch-contrib_ivshmem-server_ivshmem-server.c) = d8f53432b5752f4263dc4ef96108a976a05147a3
SHA1 (patch-hw-mips-Kconfig) = c7199ad26ac45116ab4d38252db4234ae93bdf9a
SHA1 (patch-hw-mips-mipssim.c) = 30f31c90306e73b6adb3afad4934c91ce5141e86
SHA1 (patch-default-configs-mips-softmmu-common.mak) = 00d6a6e2dfc590b7e4883ed122964292d667e332
SHA1 (patch-hw-mips-Kconfig) = 359de9f0c16543f58ba9741e4f05417ad6a9f86e
SHA1 (patch-hw-mips-Makefiles.objs) = c9d523b9310970df27d02c766225f7c22d71ae08
SHA1 (patch-hw-mips-mipssim.c) = 7c1ad117214fe130faa95c08f25b4545ee8fe0ab
SHA1 (patch-hw_alpha_alpha_sys.h) = 5908698208937ff9eb0bf1c504e1144af3d1bcc4
SHA1 (patch-hw_alpha_dp264.c) = 856304784f098863728ecac3d0a9287aa22190d7
SHA1 (patch-hw_alpha_typhoon.c) = 1bed5cd6f355c4163585c5331356ebf38c5c3a16

115
emulators/qemu/files/hw-mips-mipssim_virtio.c Normal file
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@ -0,0 +1,115 @@
/*
* QEMU/mipssim-virtio extension emulation
*
* Emulates a very simple machine model similar to the one used by the
* proprietary MIPS emulator extended by a virtio device. The purpose is to
* have a better virt platform in anticipation to a readl `virt' platform for
* MIPS.
*
* This code is derived from software contributed to The NetBSD Foundation
* by Reinoud Zandijk.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include "qemu/osdep.h"
#include "qapi/error.h"
#include "qemu-common.h"
#include "cpu.h"
#include "hw/mips/mips.h"
#include "hw/mips/cpudevs.h"
#include "hw/char/serial.h"
#include "hw/isa/isa.h"
#include "net/net.h"
#include "sysemu/sysemu.h"
#include "hw/boards.h"
#include "hw/mips/bios.h"
#include "hw/loader.h"
#include "hw/or-irq.h"
#include "elf.h"
#include "hw/sysbus.h"
#include "hw/qdev-properties.h"
#include "exec/address-spaces.h"
#include "qemu/error-report.h"
#include "sysemu/qtest.h"
#include "sysemu/reset.h"
#include "hw/virtio/virtio-mmio.h"
#define NUM_VIRTIO_TRANSPORTS 32
#define VIRTIO_STRIDE 512
#define DEV_SPACING 0x10000 /* space devices every 64k */
#define ISA_BASE 0x1fd00000
#define VIRTIO_MMIO_BASE (ISA_BASE + DEV_SPACING)
extern void mips_mipssim_init(MachineState *machine);
static void
mips_mipssim_virtio_init(MachineState *machine)
{
DeviceState *virtio_orgate;
MIPSCPU *cpu;
CPUMIPSState *env;
/* initialise parent */
mips_mipssim_init(machine);
cpu = MIPS_CPU(qemu_get_cpu(0));
env = &cpu->env;
/*
* TODO: in newer versions, we might need to adjust the cpu clock when its
* set in mips_mipssim_init()
*/
/*
* virtio extention; register 32 virtio devices just after the ISA space
* at 0x1fd10000 with stride of 512 bytes as per i386s microvm target.
* register these devices in reverse order (see comments in hw/arm/virt.c)
*/
virtio_orgate = DEVICE(object_new(TYPE_OR_IRQ));
object_property_set_int(OBJECT(virtio_orgate),
"num-lines", NUM_VIRTIO_TRANSPORTS, &error_fatal);
qdev_realize_and_unref(virtio_orgate, NULL, &error_fatal);
for (int i = NUM_VIRTIO_TRANSPORTS - 1; i >= 0; i--) {
sysbus_create_simple("virtio-mmio",
VIRTIO_MMIO_BASE + i * VIRTIO_STRIDE,
qdev_get_gpio_in(virtio_orgate, i));
}
qdev_connect_gpio_out(DEVICE(virtio_orgate), 0, env->irq[3]);
}
static void mips_mipssim_virtio_machine_init(MachineClass *mc)
{
mc->desc = "MIPS MIPSsim platform with virtio";
mc->init = mips_mipssim_virtio_init;
#ifdef TARGET_MIPS64
mc->default_cpu_type = MIPS_CPU_TYPE_NAME("5Kf");
#else
mc->default_cpu_type = MIPS_CPU_TYPE_NAME("24Kf");
#endif
mc->default_ram_id = "mips_mipssim.ram";
}
DEFINE_MACHINE("mipssim-virtio", mips_mipssim_virtio_machine_init)

12
emulators/qemu/patches/patch-default-configs-mips-softmmu-common.mak Normal file
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@ -0,0 +1,12 @@
$NetBSD: patch-default-configs-mips-softmmu-common.mak,v 1.1 2021/02/17 17:16:01 reinoud Exp $
--- default-configs/mips-softmmu-common.mak.orig 2020-08-11 19:17:14.000000000 +0000
+++ default-configs/mips-softmmu-common.mak
@@ -37,6 +37,7 @@ CONFIG_R4K=y
CONFIG_MALTA=y
CONFIG_PCNET_PCI=y
CONFIG_MIPSSIM=y
+CONFIG_MIPSSIM_VIRTIO=y
CONFIG_ACPI_SMBUS=y
CONFIG_SMBUS_EEPROM=y
CONFIG_TEST_DEVICES=y

14
emulators/qemu/patches/patch-hw-mips-Kconfig
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@ -1,13 +1,19 @@
$NetBSD: patch-hw-mips-Kconfig,v 1.1 2021/02/15 22:15:12 reinoud Exp $
$NetBSD: patch-hw-mips-Kconfig,v 1.2 2021/02/17 17:16:01 reinoud Exp $
--- hw/mips/Kconfig.orig 2020-08-11 19:17:15.000000000 +0000
+++ hw/mips/Kconfig
@@ -20,6 +20,8 @@ config MIPSSIM
select ISA_BUS
@@ -21,6 +21,14 @@ config MIPSSIM
select SERIAL_ISA
select MIPSNET
+config MIPSSIM_VIRTIO
+ bool
+ select ISA_BUS
+ select SERIAL_ISA
+ select MIPSNET
+ select VIRTIO_MMIO
+ select OR_IRQ
+
config JAZZ
bool
select ISA_BUS

12
emulators/qemu/patches/patch-hw-mips-Makefiles.objs Normal file
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@ -0,0 +1,12 @@
$NetBSD: patch-hw-mips-Makefiles.objs,v 1.1 2021/02/17 17:16:01 reinoud Exp $
--- hw/mips/Makefile.objs.orig 2020-08-11 19:17:15.000000000 +0000
+++ hw/mips/Makefile.objs
@@ -2,6 +2,7 @@ obj-y += addr.o mips_int.o
obj-$(CONFIG_R4K) += r4k.o
obj-$(CONFIG_MALTA) += gt64xxx_pci.o malta.o
obj-$(CONFIG_MIPSSIM) += mipssim.o
+obj-$(CONFIG_MIPSSIM_VIRTIO) += mipssim_virtio.o
obj-$(CONFIG_JAZZ) += jazz.o
obj-$(CONFIG_FULOONG) += fuloong2e.o
obj-$(CONFIG_MIPS_CPS) += cps.o

70
emulators/qemu/patches/patch-hw-mips-mipssim.c
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@ -1,67 +1,23 @@
$NetBSD: patch-hw-mips-mipssim.c,v 1.1 2021/02/15 22:15:12 reinoud Exp $
$NetBSD: patch-hw-mips-mipssim.c,v 1.2 2021/02/17 17:16:01 reinoud Exp $
--- hw/mips/mipssim.c.orig 2020-08-11 19:17:15.000000000 +0000
+++ hw/mips/mipssim.c
@@ -38,6 +38,7 @@
#include "hw/boards.h"
#include "hw/mips/bios.h"
#include "hw/loader.h"
+#include "hw/or-irq.h"
#include "elf.h"
#include "hw/sysbus.h"
#include "hw/qdev-properties.h"
@@ -45,6 +46,13 @@
#include "qemu/error-report.h"
@@ -46,6 +46,8 @@
#include "sysemu/qtest.h"
#include "sysemu/reset.h"
+#include "hw/virtio/virtio-mmio.h"
+
+#define NUM_VIRTIO_TRANSPORTS 32
+
+#define DEV_SPACING 0x10000 /* space devices every 64k */
+#define ISA_BASE 0x1fd00000
+#define VIRTIO_MMIO_BASE (ISA_BASE + DEV_SPACING)
+void mips_mipssim_init(MachineState *);
+
static struct _loaderparams {
int ram_size;
@@ -150,6 +158,7 @@ mips_mipssim_init(MachineState *machine)
MemoryRegion *address_space_mem = get_system_memory();
MemoryRegion *isa = g_new(MemoryRegion, 1);
MemoryRegion *bios = g_new(MemoryRegion, 1);
+ DeviceState *virtio_orgate;
MIPSCPU *cpu;
CPUMIPSState *env;
ResetData *reset_info;
@@ -209,7 +218,7 @@ mips_mipssim_init(MachineState *machine)
/* Register 64 KB of ISA IO space at 0x1fd00000. */
memory_region_init_alias(isa, NULL, "isa_mmio",
get_system_io(), 0, 0x00010000);
- memory_region_add_subregion(get_system_memory(), 0x1fd00000, isa);
+ memory_region_add_subregion(get_system_memory(), ISA_BASE, isa);
/*
* A single 16450 sits at offset 0x3f8. It is attached to
@@ -229,6 +238,23 @@ mips_mipssim_init(MachineState *machine)
if (nd_table[0].used)
/* MIPSnet uses the MIPS CPU INT0, which is interrupt 2. */
mipsnet_init(0x4200, env->irq[2], &nd_table[0]);
+
+ /*
+ * virtio extention; register 32 virtio devices just after the ISA space
+ * at 0x1fd10000 with stride of 512 bytes as per i386s microvm target.
+ * register these devices in reverse order (see comments in hw/arm/virt.c)
+ */
+ virtio_orgate = DEVICE(object_new(TYPE_OR_IRQ));
+ object_property_set_int(OBJECT(virtio_orgate),
+ "num-lines", NUM_VIRTIO_TRANSPORTS, &error_fatal);
+ qdev_realize_and_unref(virtio_orgate, NULL, &error_fatal);
+
+ for (int i = NUM_VIRTIO_TRANSPORTS - 1; i >= 0; i--) {
+ sysbus_create_simple("virtio-mmio",
+ 0x1fd10000 + i * 512,
+ qdev_get_gpio_in(virtio_orgate, i));
+ }
+ qdev_connect_gpio_out(DEVICE(virtio_orgate), 0, env->irq[3]);
const char *kernel_filename;
@@ -140,8 +142,7 @@ static void mipsnet_init(int base, qemu_
sysbus_mmio_get_region(s, 0));
}
static void mips_mipssim_machine_init(MachineClass *mc)
-static void
-mips_mipssim_init(MachineState *machine)
+void mips_mipssim_init(MachineState *machine)
{
const char *kernel_filename = machine->kernel_filename;
const char *kernel_cmdline = machine->kernel_cmdline;