Import cgen-20131001 as devel/cgen.

CGEN (pronounced seejen) is a framework for developing generators
of CPU-related tools such as assemblers, disassemblers and simulators.
It specifies a description language for describing the architecture
and organization of a CPU without reference to any particular
application. Additional applications can be written within the
framework. CGEN is written in Scheme and can be run under the GNU
Guile interpreter. It is placed under a free software license.

devel/cgen/DESCR

@@ -0,0 +1,7 @@
+CGEN (pronounced seejen) is a framework for developing generators
+of CPU-related tools such as assemblers, disassemblers and simulators.
+It specifies a description language for describing the architecture
+and organization of a CPU without reference to any particular
+application. Additional applications can be written within the
+framework. CGEN is written in Scheme and can be run under the GNU
+Guile interpreter. It is placed under a free software license.

devel/cgen/MESSAGE

@@ -0,0 +1,25 @@
+===========================================================================
+$NetBSD: MESSAGE,v 1.1 2013/10/12 08:39:02 ryoon Exp $
+
+To generating opcode file and description files for M32R, for example.
+Please run the following commands.
+In detail, see info files and ${PREFIX}/share/cgen/cgen/Makefile.in .
+
+$ guile -l ${PREFIX}/share/cgen/cgen/guile.scm \
+  -s ${PREFIX}/share/cgen/cgen/cgen-opc.scm \
+  -s ${PREFIX}/share/cgen/cgen \
+  -v \
+  -a ${PREFIX}/share/cgen/cpu/m32r.cpu \
+  -i "all" \
+  -m "all" \
+  -H m32r-desc.h \
+  -C m32r-desc.c
+
+$ guile -l ${PREFIX}/share/cgen/cgen/guile.scm \
+  -s ${PREFIX}/share/cgen/cgen/cgen-doc.scm \
+  -s ${PREFIX}/share/cgen/cgen \
+  -v \
+  -a ${PREFIX}/share/cgen/cpu/m32r.cpu \
+  -H m32r.html \
+  -I m32r-insn.html  
+===========================================================================

devel/cgen/Makefile

@@ -0,0 +1,39 @@
+# $NetBSD: Makefile,v 1.1 2013/10/12 08:39:02 ryoon Exp $
+
+DISTNAME=	cgen-20131001
+CATEGORIES=	devel
+MASTER_SITES=	ftp://sourceware.org/pub/cgen/snapshots/
+EXTRACT_SUFX=	.tar.bz2
+
+MAINTAINER=	ryoon@NetBSD.org
+HOMEPAGE=	https://sourceware.org/cgen/
+COMMENT=	CGEN, the Cpu tools GENerator
+LICENSE=	gnu-gpl-v3 # with Red Hat exception
+
+DEPENDS+=	guile-[0-9]*:../../lang/guile
+
+WRKSRC=		${WRKDIR}/src
+
+CONFIGURE_DIRS=	cgen
+
+USE_TOOLS+=	makeinfo pax
+USE_LANGUAGES=	c
+
+GNU_CONFIGURE=	yes
+INFO_FILES=	yes
+
+BUILD_TARGET=	info
+INSTALL_TARGET=	install-info
+
+CGEN_DIR=	share/cgen
+INSTALLATION_DIRS+=	${CGEN_DIR}/cgen ${CGEN_DIR}/cpu
+
+post-install:
+	cd ${WRKSRC}/${CONFIGURE_DIRS} && \
+	${FIND} . -type f \! \( -name '*.orig' -o -name 'Makefile' -o -name 'config*' \) -print | \
+		pax -rw ${DESTDIR}${PREFIX}/${CGEN_DIR}/cgen
+	cd ${WRKSRC}/cpu && \
+	${FIND} . -type f \! \( -name '*.orig' -o -name 'Makefile*' -o -name 'config*' \) -print | \
+		pax -rw ${DESTDIR}${PREFIX}/${CGEN_DIR}/cpu
+
+.include "../../mk/bsd.pkg.mk"

devel/cgen/PLIST

@@ -0,0 +1,189 @@
+@comment $NetBSD: PLIST,v 1.1 2013/10/12 08:39:02 ryoon Exp $
+info/cgen.info
+info/cgenint.info
+share/cgen/cgen/AUTHORS
+share/cgen/cgen/COPYING.CGEN
+share/cgen/cgen/ChangeLog
+share/cgen/cgen/INSTALL
+share/cgen/cgen/Makefile.am
+share/cgen/cgen/Makefile.in
+share/cgen/cgen/NEWS
+share/cgen/cgen/README
+share/cgen/cgen/aclocal.m4
+share/cgen/cgen/attr.scm
+share/cgen/cgen/cgen-doc.scm
+share/cgen/cgen/cgen-gas.scm
+share/cgen/cgen/cgen-intrinsics.scm
+share/cgen/cgen/cgen-opc.scm
+share/cgen/cgen/cgen-sid.scm
+share/cgen/cgen/cgen-sim.scm
+share/cgen/cgen/cgen-stest.scm
+share/cgen/cgen/cgen-testsuite.scm
+share/cgen/cgen/co-for-gen-all
+share/cgen/cgen/cos-pprint.scm
+share/cgen/cgen/cos.scm
+share/cgen/cgen/cpu/arm.cpu
+share/cgen/cgen/cpu/arm.sim
+share/cgen/cgen/cpu/arm7.cpu
+share/cgen/cgen/cpu/i960.cpu
+share/cgen/cgen/cpu/i960.opc
+share/cgen/cgen/cpu/ia32.cpu
+share/cgen/cgen/cpu/ia64.cpu
+share/cgen/cgen/cpu/m68k.cpu
+share/cgen/cgen/cpu/play.cpu
+share/cgen/cgen/cpu/play.opc
+share/cgen/cgen/cpu/powerpc.cpu
+share/cgen/cgen/cpu/sh-sid.cpu
+share/cgen/cgen/cpu/sh-sim.cpu
+share/cgen/cgen/cpu/sh.cpu
+share/cgen/cgen/cpu/sh.opc
+share/cgen/cgen/cpu/sh64-compact.cpu
+share/cgen/cgen/cpu/sh64-media.cpu
+share/cgen/cgen/cpu/simplify.inc
+share/cgen/cgen/cpu/sparc.cpu
+share/cgen/cgen/cpu/sparc.opc
+share/cgen/cgen/cpu/sparc32.cpu
+share/cgen/cgen/cpu/sparc64.cpu
+share/cgen/cgen/cpu/sparccom.cpu
+share/cgen/cgen/cpu/sparcfpu.cpu
+share/cgen/cgen/cpu/thumb.cpu
+share/cgen/cgen/decode.scm
+share/cgen/cgen/desc-cpu.scm
+share/cgen/cgen/desc.scm
+share/cgen/cgen/dev-utils.scm
+share/cgen/cgen/dev.scm
+share/cgen/cgen/doc/Makefile.am
+share/cgen/cgen/doc/Makefile.in
+share/cgen/cgen/doc/app.texi
+share/cgen/cgen/doc/cgen.info
+share/cgen/cgen/doc/cgen.texi
+share/cgen/cgen/doc/cgenint.info
+share/cgen/cgen/doc/cgenint.texi
+share/cgen/cgen/doc/credits.texi
+share/cgen/cgen/doc/glossary.texi
+share/cgen/cgen/doc/intro.texi
+share/cgen/cgen/doc/mdate-sh
+share/cgen/cgen/doc/notes.texi
+share/cgen/cgen/doc/opcodes.texi
+share/cgen/cgen/doc/pmacros.texi
+share/cgen/cgen/doc/porting.texi
+share/cgen/cgen/doc/rtl.texi
+share/cgen/cgen/doc/running.texi
+share/cgen/cgen/doc/sim.texi
+share/cgen/cgen/doc/stamp-vti
+share/cgen/cgen/doc/version.texi
+share/cgen/cgen/enum.scm
+share/cgen/cgen/gas-test.scm
+share/cgen/cgen/gen-all
+share/cgen/cgen/gen-all-desc
+share/cgen/cgen/gen-all-doc
+share/cgen/cgen/gen-all-intrinsics
+share/cgen/cgen/gen-all-opcodes
+share/cgen/cgen/gen-all-sid
+share/cgen/cgen/gen-all-sim
+share/cgen/cgen/guile.scm
+share/cgen/cgen/hardware.scm
+share/cgen/cgen/html.scm
+share/cgen/cgen/ifield.scm
+share/cgen/cgen/iformat.scm
+share/cgen/cgen/insn.scm
+share/cgen/cgen/intrinsics.scm
+share/cgen/cgen/mach.scm
+share/cgen/cgen/minsn.scm
+share/cgen/cgen/mode.scm
+share/cgen/cgen/model.scm
+share/cgen/cgen/opc-asmdis.scm
+share/cgen/cgen/opc-ibld.scm
+share/cgen/cgen/opc-itab.scm
+share/cgen/cgen/opc-opinst.scm
+share/cgen/cgen/opcodes.scm
+share/cgen/cgen/operand.scm
+share/cgen/cgen/pgmr-tools.scm
+share/cgen/cgen/pmacros.scm
+share/cgen/cgen/pprint.scm
+share/cgen/cgen/profile.scm
+share/cgen/cgen/read.scm
+share/cgen/cgen/rtl-c.scm
+share/cgen/cgen/rtl-traverse.scm
+share/cgen/cgen/rtl-xform.scm
+share/cgen/cgen/rtl.scm
+share/cgen/cgen/rtx-funcs.scm
+share/cgen/cgen/sem-frags.scm
+share/cgen/cgen/semantics.scm
+share/cgen/cgen/sid-cpu.scm
+share/cgen/cgen/sid-decode.scm
+share/cgen/cgen/sid-model.scm
+share/cgen/cgen/sid.scm
+share/cgen/cgen/sim-arch.scm
+share/cgen/cgen/sim-cpu.scm
+share/cgen/cgen/sim-decode.scm
+share/cgen/cgen/sim-model.scm
+share/cgen/cgen/sim-test.scm
+share/cgen/cgen/sim.scm
+share/cgen/cgen/slib/genwrite.scm
+share/cgen/cgen/slib/logical.scm
+share/cgen/cgen/slib/pp.scm
+share/cgen/cgen/slib/random.scm
+share/cgen/cgen/slib/sort.scm
+share/cgen/cgen/stamp-h.in
+share/cgen/cgen/testsuite.scm
+share/cgen/cgen/testsuite/Makefile.am
+share/cgen/cgen/testsuite/Makefile.in
+share/cgen/cgen/testsuite/location-1.test
+share/cgen/cgen/testsuite/names-comments-1.test
+share/cgen/cgen/testsuite/pmacros-1.test
+share/cgen/cgen/testsuite/run-tests.sh
+share/cgen/cgen/testsuite/test-utils.sh
+share/cgen/cgen/testsuite/test-utils.sh.in
+share/cgen/cgen/testsuite/testsuite.cpu
+share/cgen/cgen/types.scm
+share/cgen/cgen/utils-cgen.scm
+share/cgen/cgen/utils-gen.scm
+share/cgen/cgen/utils-sim.scm
+share/cgen/cgen/utils.scm
+share/cgen/cpu/ChangeLog
+share/cgen/cpu/cris.cpu
+share/cgen/cpu/epiphany.cpu
+share/cgen/cpu/epiphany.opc
+share/cgen/cpu/fr30.cpu
+share/cgen/cpu/fr30.opc
+share/cgen/cpu/frv.cpu
+share/cgen/cpu/frv.opc
+share/cgen/cpu/ip2k.cpu
+share/cgen/cpu/ip2k.opc
+share/cgen/cpu/iq10.cpu
+share/cgen/cpu/iq2000.cpu
+share/cgen/cpu/iq2000.opc
+share/cgen/cpu/iq2000m.cpu
+share/cgen/cpu/lm32.cpu
+share/cgen/cpu/lm32.opc
+share/cgen/cpu/m32c.cpu
+share/cgen/cpu/m32c.opc
+share/cgen/cpu/m32r.cpu
+share/cgen/cpu/m32r.opc
+share/cgen/cpu/mep-avc.cpu
+share/cgen/cpu/mep-avc2.cpu
+share/cgen/cpu/mep-c5.cpu
+share/cgen/cpu/mep-core.cpu
+share/cgen/cpu/mep-default.cpu
+share/cgen/cpu/mep-ext-cop.cpu
+share/cgen/cpu/mep-fmax.cpu
+share/cgen/cpu/mep-h1.cpu
+share/cgen/cpu/mep-ivc2.cpu
+share/cgen/cpu/mep-rhcop.cpu
+share/cgen/cpu/mep-sample-ucidsp.cpu
+share/cgen/cpu/mep.cpu
+share/cgen/cpu/mep.opc
+share/cgen/cpu/mt.cpu
+share/cgen/cpu/mt.opc
+share/cgen/cpu/openrisc.cpu
+share/cgen/cpu/openrisc.opc
+share/cgen/cpu/sh.cpu
+share/cgen/cpu/sh.opc
+share/cgen/cpu/sh64-compact.cpu
+share/cgen/cpu/sh64-media.cpu
+share/cgen/cpu/simplify.inc
+share/cgen/cpu/xc16x.cpu
+share/cgen/cpu/xc16x.opc
+share/cgen/cpu/xstormy16.cpu
+share/cgen/cpu/xstormy16.opc

devel/cgen/distinfo

@@ -0,0 +1,7 @@
+$NetBSD: distinfo,v 1.1 2013/10/12 08:39:02 ryoon Exp $
+
+SHA1 (cgen-20131001.tar.bz2) = f456bd2c2a9a28871c99c6261c5d0fed02b15de3
+RMD160 (cgen-20131001.tar.bz2) = 5fca888ddc4ec8768de553e8a907c69aeb9256f2
+Size (cgen-20131001.tar.bz2) = 1631519 bytes
+SHA1 (patch-cgen_gen-all) = b1729f27fd9a8d7a8a6afca0acd6608297efe19b
+SHA1 (patch-cgen_testsuite_run-tests.sh) = 69d513dd93a3369506ea47a98c1c30455f0f3343

devel/cgen/patches/patch-cgen_gen-all

@@ -0,0 +1,22 @@
+$NetBSD: patch-cgen_gen-all,v 1.1 2013/10/12 08:39:03 ryoon Exp $
+
+--- cgen/gen-all.orig	2012-12-17 16:55:41.000000000 +0000
++++ cgen/gen-all
+@@ -153,7 +153,7 @@ do
+ 	exit 1
+     fi
+ done
+-if [ "${do_sid}" == "yes" ]
++if [ "${do_sid}" = "yes" ]
+ then
+     for c in ${sid_cpus}
+     do
+@@ -174,7 +174,7 @@ config_src () {
+     prefix=$2
+ 
+     extra_config_args=""
+-    if [ "${target_sys}" == "${build_all_target_sys}" ]
++    if [ "${target_sys}" = "${build_all_target_sys}" ]
+     then
+ 	extra_config_args="${extra_config_args} --enable-targets=all"
+     fi

devel/cgen/patches/patch-cgen_testsuite_run-tests.sh

@@ -0,0 +1,22 @@
+$NetBSD: patch-cgen_testsuite_run-tests.sh,v 1.1 2013/10/12 08:39:03 ryoon Exp $
+
+--- cgen/testsuite/run-tests.sh.orig	2009-08-06 16:40:44.000000000 +0000
++++ cgen/testsuite/run-tests.sh
+@@ -6,7 +6,7 @@
+ 
+ # The names of tests to run, or ""/"all".
+ test_list="$@"
+-[ "$test_list" == "" ] && test_list=all
++[ "$test_list" = "" ] && test_list=all
+ 
+ test="driver"
+ source ./test-utils.sh
+@@ -39,7 +39,7 @@ echo "Test summary:"
+ echo "# failures: ${fail_count}"
+ echo "# passes:   ${pass_count}"
+ 
+-if [ ${fail_count} == 0 ]
++if [ ${fail_count} = 0 ]
+ then
+     exit 0
+ else