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Apply fix from

Browse source 
https://bugs.llvm.org/show_bug.cgi?id=46683
i.e.
  a5d161c119

so that we avoid emitting a 64-bit-only instructio in 32-bit PPC mode.

Bump PKGREVISION.
This commit is contained in:
he 2020-11-06 20:13:49 +00:00
parent a3c642a3f2
commit 7fae814777
3 changed files with 26 additions and 2 deletions
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3
lang/rust/Makefile
View file

@ -1,7 +1,8 @@
# $NetBSD: Makefile,v 1.200 2020/10/29 11:04:59 ryoon Exp $
# $NetBSD: Makefile,v 1.201 2020/11/06 20:13:49 he Exp $
DISTNAME= rustc-1.46.0-src
PKGNAME= ${DISTNAME:S/rustc/rust/:S/-src//}
PKGREVISION= 1
CATEGORIES= lang
MASTER_SITES= https://static.rust-lang.org/dist/

3
lang/rust/distinfo
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@ -1,4 +1,4 @@
$NetBSD: distinfo,v 1.119 2020/10/28 11:16:46 he Exp $
$NetBSD: distinfo,v 1.120 2020/11/06 20:13:49 he Exp $
SHA1 (rust-1.45.0-x86_64-sun-solaris.tar.gz) = f0c0ce644e0f72b240ecd797b22df271f6e24a5a
RMD160 (rust-1.45.0-x86_64-sun-solaris.tar.gz) = ebf9813d4e4626cdfa5d4bdceb8e4912b0d12ed2
@ -111,6 +111,7 @@ SHA1 (patch-src_llvm-project_llvm_CMakeLists.txt) = d49503d19c30a64d571eb7fa79e7
SHA1 (patch-src_llvm-project_llvm_cmake_modules_AddLLVM.cmake) = 199ae71ae2e42bb67e54354a051fc9faa71f9bfe
SHA1 (patch-src_llvm-project_llvm_include_llvm-c_DataTypes.h) = 7588a46aaa277ef04b33ac6d904b9d1d81579f2a
SHA1 (patch-src_llvm-project_llvm_include_llvm_Analysis_ConstantFolding.h) = 977de4b2a9d37f7e7c782f2407c15591e032b6c6
SHA1 (patch-src_llvm-project_llvm_lib_Target_PowerPC_PPCInstrInfo.td) = b2e8c29a279d511b51414241b3fe6a2f14c26502
SHA1 (patch-src_llvm-project_llvm_utils_FileCheck_FileCheck.cpp) = 2675b93a1d636b297a3e1e84b915a15a3da67939
SHA1 (patch-src_tools_cargo_src_cargo_core_profiles.rs) = 3aac5d54a6fe96b9559552e67e497488142d4e80
SHA1 (patch-src_tools_cargo_tests_testsuite_build.rs) = 10e6c1253adac0262b000aec7636fa0d2ebb666c

22
lang/rust/patches/patch-src_llvm-project_llvm_lib_Target_PowerPC_PPCInstrInfo.td Normal file
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@ -0,0 +1,22 @@
$NetBSD: patch-src_llvm-project_llvm_lib_Target_PowerPC_PPCInstrInfo.td,v 1.1 2020/11/06 20:13:49 he Exp $
Apply fix from
https://github.com/llvm/llvm-project/commit/a5d161c119d5a03c1ce834c6f4ce2576d6a064e4
so we avoid emitting a 64-bit-only instruction in 32-bit ppc code.
--- src/llvm-project/llvm/lib/Target/PowerPC/PPCInstrInfo.td.orig 2020-07-07 06:39:17.000000000 +0000
+++ src/llvm-project/llvm/lib/Target/PowerPC/PPCInstrInfo.td
@@ -5025,8 +5025,11 @@ def RotateInsertByte1 {
dag Left = (RLWIMI RotateInsertByte3.Left, Swap4.Bits, 8, 24, 31);
}
-def : Pat<(i32 (bitreverse i32:$A)),
- (RLDICL_32 RotateInsertByte1.Left, 0, 32)>;
+// Clear the upper half of the register when in 64-bit mode
+let Predicates = [In64BitMode] in
+def : Pat<(i32 (bitreverse i32:$A)), (RLDICL_32 RotateInsertByte1.Left, 0, 32)>;
+let Predicates = [In32BitMode] in
+def : Pat<(i32 (bitreverse i32:$A)), RotateInsertByte1.Left>;
// Fast 64-bit reverse bits algorithm:
// Step 1: 1-bit swap (swap odd 1-bit and even 1-bit):