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Add a u-boot target for the Orange Pi Zero Plus (based on Allwinner H5

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SoC).
This commit is contained in:
thorpej 2018-06-24 23:15:25 +00:00
parent 107bfe0475
commit bce9a10fe0
8 changed files with 167 additions and 2 deletions
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3
sysutils/Makefile
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@ -1,4 +1,4 @@
# $NetBSD: Makefile,v 1.768 2018/06/24 11:13:58 bsiegert Exp $
# $NetBSD: Makefile,v 1.769 2018/06/24 23:15:25 thorpej Exp $
#
COMMENT= System utilities
@ -625,6 +625,7 @@ SUBDIR+= u-boot-orangepi-2
SUBDIR+= u-boot-orangepi-one
SUBDIR+= u-boot-orangepi-plus2e
SUBDIR+= u-boot-orangepi-zero
SUBDIR+= u-boot-orangepi-zero-plus
SUBDIR+= u-boot-pine-h64
SUBDIR+= u-boot-pine64
SUBDIR+= u-boot-pinebook

5
sysutils/u-boot-orangepi-zero-plus/DESCR Normal file
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@ -0,0 +1,5 @@
U-Boot is a bootloader for embedded boards based on PowerPC, ARM, MIPS and
several other processors, which can be installed in a boot ROM and used to
initialize and test the hardware or to download and run application code.
This package provides U-Boot for the Xunlong Orange Pi Zero Plus.

17
sysutils/u-boot-orangepi-zero-plus/Makefile Normal file
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@ -0,0 +1,17 @@
# $NetBSD: Makefile,v 1.1 2018/06/24 23:18:01 thorpej Exp $
UBOOT_TARGET= orangepi-zero-plus
UBOOT_CONFIG= orangepi_zero_plus_defconfig
UBOOT_BIN= u-boot-sunxi-with-spl.bin
# Switch to EL1 before booting kernel (required for 32-bit support)
PKG_DEFAULT_OPTIONS+= el1
post-extract:
${CP} ${PREFIX}/share/arm-trusted-firmware/sun50iw1p1/bl31.bin ${WRKSRC}
post-build:
${CAT} ${WRKSRC}/spl/sunxi-spl.bin ${WRKSRC}/u-boot.itb > ${WRKSRC}/u-boot-sunxi-with-spl.bin
.include "../../sysutils/arm-trusted-firmware-sun50iw1p1/buildlink3.mk"
.include "../../sysutils/u-boot/u-boot-arm64.mk"

2
sysutils/u-boot-orangepi-zero-plus/PLIST Normal file
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@ -0,0 +1,2 @@
@comment $NetBSD: PLIST,v 1.1 2018/06/24 23:18:01 thorpej Exp $
share/u-boot/orangepi-zero-plus/u-boot-sunxi-with-spl.bin

5
sysutils/u-boot/distinfo
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@ -1,4 +1,4 @@
$NetBSD: distinfo,v 1.13 2018/05/25 20:49:52 jakllsch Exp $
$NetBSD: distinfo,v 1.14 2018/06/24 23:18:01 thorpej Exp $
SHA1 (u-boot-2018.05.tar.bz2) = 605543501f7450ffa4e9c7fd98d2f36dbc0657b0
RMD160 (u-boot-2018.05.tar.bz2) = b305357058feb875233c3a32f41e14548b97855d
@ -9,3 +9,6 @@ SHA1 (patch-arch_arm_dts_sun50i-h5-nanopi-neo-plus2.dts) = 5aae66cd400e7d48312fd
SHA1 (patch-drivers_video_sunxi_sunxi__display.c) = 8e6a6a781cce25af5cba289fc2ca76e30b62aff6
SHA1 (patch-include_configs_tegra-common.h) = 4cda8f9df2c7fc2b9cd9d4139ec679a42648e4f8
SHA1 (patch-lib_bch.c) = b1f1c7418f1004c151b9e5e06ab7047a1736ae47
SHA1 (patch-arch_arm_dts_Makefile) = 1730c74c5ca78a4156cea4a903e153b1d61b3171
SHA1 (patch-arch_arm_dts_sun50i-h5-orangepi-zero-plus.dts) = 191402f0f68c1916196430819c50a36a4808b79f
SHA1 (patch-configs_orangepi_zero_plus_defconfig) = 328204fda6f202a2468c34b60fda71e0aa72e92a

10
sysutils/u-boot/patches/patch-arch_arm_dts_Makefile Normal file
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@ -0,0 +1,10 @@
--- arch/arm/dts/Makefile.orig 2018-06-23 11:16:15.355163284 -0700
+++ arch/arm/dts/Makefile 2018-06-23 11:17:10.186971126 -0700
@@ -372,6 +372,7 @@ dtb-$(CONFIG_MACH_SUN50I_H5) += \
sun50i-h5-nanopi-neo-plus2.dtb \
sun50i-h5-orangepi-pc2.dtb \
sun50i-h5-orangepi-prime.dtb \
+ sun50i-h5-orangepi-zero-plus.dtb \
sun50i-h5-orangepi-zero-plus2.dtb
dtb-$(CONFIG_MACH_SUN50I) += \
sun50i-a64-bananapi-m64.dtb \

107
sysutils/u-boot/patches/patch-arch_arm_dts_sun50i-h5-orangepi-zero-plus.dts Normal file
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@ -0,0 +1,107 @@
--- /dev/null 2018-06-23 13:10:16.352268111 -0700
+++ arch/arm/dts/sun50i-h5-orangepi-zero-plus.dts 2018-06-23 13:09:34.768075589 -0700
@@ -0,0 +1,104 @@
+/*
+ * Copyright (C) 2016 ARM Ltd.
+ * Copyright (C) 2018 Hauke Mehrtens <hauke@hauke-m.de>
+ *
+ * SPDX-License-Identifier: (GPL-2.0+ OR X11)
+ */
+
+/dts-v1/;
+#include "sun50i-h5.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/pinctrl/sun4i-a10.h>
+
+/ {
+ model = "Xunlong Orange Pi Zero Plus";
+ compatible = "xunlong,orangepi-zero-plus", "allwinner,sun50i-h5";
+
+ reg_vcc3v3: vcc3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ aliases {
+ ethernet0 = &emac;
+ ethernet1 = &rtl8189ftv;
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ pwr {
+ label = "orangepi:green:pwr";
+ gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; /* PA10 */
+ default-state = "on";
+ };
+
+ status {
+ label = "orangepi:red:status";
+ gpios = <&pio 0 17 GPIO_ACTIVE_HIGH>; /* PA17 */
+ };
+ };
+
+ reg_gmac_3v3: gmac-3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "gmac-3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ startup-delay-us = <100000>;
+ enable-active-high;
+ gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; /* PD6 */
+ };
+};
+
+&emac {
+ pinctrl-names = "default";
+ pinctrl-0 = <&emac_rgmii_pins>;
+ phy-supply = <&reg_gmac_3v3>;
+ phy-handle = <&ext_rgmii_phy>;
+ phy-mode = "rgmii";
+ status = "okay";
+};
+
+&external_mdio {
+ ext_rgmii_phy: ethernet-phy@1 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <1>;
+ };
+};
+
+&mmc0 {
+ vmmc-supply = <&reg_vcc3v3>;
+ bus-width = <4>;
+ cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
+ status = "okay";
+};
+
+&mmc1 {
+ vmmc-supply = <&reg_vcc3v3>;
+ bus-width = <4>;
+ non-removable;
+ status = "okay";
+
+ /*
+ * Explicitly define the sdio device, so that we can add an ethernet
+ * alias for it (which e.g. makes u-boot set a mac-address).
+ */
+ rtl8189ftv: sdio_wifi@1 {
+ reg = <1>;
+ };
+};
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pins_a>;
+ status = "okay";
+};

20
sysutils/u-boot/patches/patch-configs_orangepi_zero_plus_defconfig Normal file
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@ -0,0 +1,20 @@
--- /dev/null
+++ configs/orangepi_zero_plus_defconfig 2018-06-23 11:43:24.637732181 -0700
@@ -0,0 +1,17 @@
+CONFIG_ARM=y
+CONFIG_ARCH_SUNXI=y
+CONFIG_SPL=y
+CONFIG_MACH_SUN50I_H5=y
+CONFIG_DRAM_CLK=624
+CONFIG_DRAM_ZQ=3881977
+CONFIG_MMC0_CD_PIN="PH13"
+# CONFIG_MMC_SUNXI_SLOT_EXTRA=2
+CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-orangepi-zero-plus"
+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_SPL_DOS_PARTITION is not set
+# CONFIG_SPL_EFI_PARTITION is not set
+CONFIG_SUN8I_EMAC=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
+