Add a u-boot target for the Orange Pi Zero Plus (based on Allwinner H5
SoC).
This commit is contained in:
parent
107bfe0475
commit
bce9a10fe0
8 changed files with 167 additions and 2 deletions
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@ -1,4 +1,4 @@
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# $NetBSD: Makefile,v 1.768 2018/06/24 11:13:58 bsiegert Exp $
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# $NetBSD: Makefile,v 1.769 2018/06/24 23:15:25 thorpej Exp $
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#
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COMMENT= System utilities
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@ -625,6 +625,7 @@ SUBDIR+= u-boot-orangepi-2
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SUBDIR+= u-boot-orangepi-one
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SUBDIR+= u-boot-orangepi-plus2e
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SUBDIR+= u-boot-orangepi-zero
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SUBDIR+= u-boot-orangepi-zero-plus
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SUBDIR+= u-boot-pine-h64
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SUBDIR+= u-boot-pine64
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SUBDIR+= u-boot-pinebook
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5
sysutils/u-boot-orangepi-zero-plus/DESCR
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5
sysutils/u-boot-orangepi-zero-plus/DESCR
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U-Boot is a bootloader for embedded boards based on PowerPC, ARM, MIPS and
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several other processors, which can be installed in a boot ROM and used to
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initialize and test the hardware or to download and run application code.
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This package provides U-Boot for the Xunlong Orange Pi Zero Plus.
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17
sysutils/u-boot-orangepi-zero-plus/Makefile
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17
sysutils/u-boot-orangepi-zero-plus/Makefile
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# $NetBSD: Makefile,v 1.1 2018/06/24 23:18:01 thorpej Exp $
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UBOOT_TARGET= orangepi-zero-plus
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UBOOT_CONFIG= orangepi_zero_plus_defconfig
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UBOOT_BIN= u-boot-sunxi-with-spl.bin
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# Switch to EL1 before booting kernel (required for 32-bit support)
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PKG_DEFAULT_OPTIONS+= el1
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post-extract:
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${CP} ${PREFIX}/share/arm-trusted-firmware/sun50iw1p1/bl31.bin ${WRKSRC}
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post-build:
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${CAT} ${WRKSRC}/spl/sunxi-spl.bin ${WRKSRC}/u-boot.itb > ${WRKSRC}/u-boot-sunxi-with-spl.bin
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.include "../../sysutils/arm-trusted-firmware-sun50iw1p1/buildlink3.mk"
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.include "../../sysutils/u-boot/u-boot-arm64.mk"
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2
sysutils/u-boot-orangepi-zero-plus/PLIST
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2
sysutils/u-boot-orangepi-zero-plus/PLIST
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@comment $NetBSD: PLIST,v 1.1 2018/06/24 23:18:01 thorpej Exp $
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share/u-boot/orangepi-zero-plus/u-boot-sunxi-with-spl.bin
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@ -1,4 +1,4 @@
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$NetBSD: distinfo,v 1.13 2018/05/25 20:49:52 jakllsch Exp $
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$NetBSD: distinfo,v 1.14 2018/06/24 23:18:01 thorpej Exp $
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SHA1 (u-boot-2018.05.tar.bz2) = 605543501f7450ffa4e9c7fd98d2f36dbc0657b0
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RMD160 (u-boot-2018.05.tar.bz2) = b305357058feb875233c3a32f41e14548b97855d
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@ -9,3 +9,6 @@ SHA1 (patch-arch_arm_dts_sun50i-h5-nanopi-neo-plus2.dts) = 5aae66cd400e7d48312fd
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SHA1 (patch-drivers_video_sunxi_sunxi__display.c) = 8e6a6a781cce25af5cba289fc2ca76e30b62aff6
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SHA1 (patch-include_configs_tegra-common.h) = 4cda8f9df2c7fc2b9cd9d4139ec679a42648e4f8
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SHA1 (patch-lib_bch.c) = b1f1c7418f1004c151b9e5e06ab7047a1736ae47
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SHA1 (patch-arch_arm_dts_Makefile) = 1730c74c5ca78a4156cea4a903e153b1d61b3171
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SHA1 (patch-arch_arm_dts_sun50i-h5-orangepi-zero-plus.dts) = 191402f0f68c1916196430819c50a36a4808b79f
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SHA1 (patch-configs_orangepi_zero_plus_defconfig) = 328204fda6f202a2468c34b60fda71e0aa72e92a
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10
sysutils/u-boot/patches/patch-arch_arm_dts_Makefile
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10
sysutils/u-boot/patches/patch-arch_arm_dts_Makefile
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--- arch/arm/dts/Makefile.orig 2018-06-23 11:16:15.355163284 -0700
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+++ arch/arm/dts/Makefile 2018-06-23 11:17:10.186971126 -0700
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@@ -372,6 +372,7 @@ dtb-$(CONFIG_MACH_SUN50I_H5) += \
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sun50i-h5-nanopi-neo-plus2.dtb \
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sun50i-h5-orangepi-pc2.dtb \
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sun50i-h5-orangepi-prime.dtb \
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+ sun50i-h5-orangepi-zero-plus.dtb \
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sun50i-h5-orangepi-zero-plus2.dtb
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dtb-$(CONFIG_MACH_SUN50I) += \
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sun50i-a64-bananapi-m64.dtb \
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@ -0,0 +1,107 @@
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--- /dev/null 2018-06-23 13:10:16.352268111 -0700
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+++ arch/arm/dts/sun50i-h5-orangepi-zero-plus.dts 2018-06-23 13:09:34.768075589 -0700
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@@ -0,0 +1,104 @@
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+/*
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+ * Copyright (C) 2016 ARM Ltd.
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+ * Copyright (C) 2018 Hauke Mehrtens <hauke@hauke-m.de>
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+ *
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+ * SPDX-License-Identifier: (GPL-2.0+ OR X11)
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+ */
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+
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+/dts-v1/;
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+#include "sun50i-h5.dtsi"
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+
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+#include <dt-bindings/gpio/gpio.h>
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+#include <dt-bindings/input/input.h>
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+#include <dt-bindings/pinctrl/sun4i-a10.h>
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+
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+/ {
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+ model = "Xunlong Orange Pi Zero Plus";
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+ compatible = "xunlong,orangepi-zero-plus", "allwinner,sun50i-h5";
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+
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+ reg_vcc3v3: vcc3v3 {
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+ compatible = "regulator-fixed";
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+ regulator-name = "vcc3v3";
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+ regulator-min-microvolt = <3300000>;
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+ regulator-max-microvolt = <3300000>;
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+ };
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+
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+ aliases {
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+ ethernet0 = &emac;
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+ ethernet1 = &rtl8189ftv;
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+ serial0 = &uart0;
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+ };
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+
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+ chosen {
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+ stdout-path = "serial0:115200n8";
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+ };
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+
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+ leds {
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+ compatible = "gpio-leds";
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+
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+ pwr {
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+ label = "orangepi:green:pwr";
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+ gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; /* PA10 */
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+ default-state = "on";
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+ };
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+
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+ status {
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+ label = "orangepi:red:status";
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+ gpios = <&pio 0 17 GPIO_ACTIVE_HIGH>; /* PA17 */
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+ };
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+ };
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+
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+ reg_gmac_3v3: gmac-3v3 {
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+ compatible = "regulator-fixed";
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+ regulator-name = "gmac-3v3";
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+ regulator-min-microvolt = <3300000>;
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+ regulator-max-microvolt = <3300000>;
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+ startup-delay-us = <100000>;
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+ enable-active-high;
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+ gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; /* PD6 */
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+ };
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+};
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+
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+&emac {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&emac_rgmii_pins>;
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+ phy-supply = <®_gmac_3v3>;
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+ phy-handle = <&ext_rgmii_phy>;
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+ phy-mode = "rgmii";
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+ status = "okay";
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+};
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+
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+&external_mdio {
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+ ext_rgmii_phy: ethernet-phy@1 {
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+ compatible = "ethernet-phy-ieee802.3-c22";
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+ reg = <1>;
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+ };
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+};
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+
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+&mmc0 {
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+ vmmc-supply = <®_vcc3v3>;
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+ bus-width = <4>;
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+ cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
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+ status = "okay";
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+};
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+
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+&mmc1 {
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+ vmmc-supply = <®_vcc3v3>;
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+ bus-width = <4>;
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+ non-removable;
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+ status = "okay";
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+
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+ /*
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+ * Explicitly define the sdio device, so that we can add an ethernet
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+ * alias for it (which e.g. makes u-boot set a mac-address).
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+ */
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+ rtl8189ftv: sdio_wifi@1 {
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+ reg = <1>;
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+ };
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+};
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+
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+&uart0 {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&uart0_pins_a>;
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+ status = "okay";
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+};
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@ -0,0 +1,20 @@
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--- /dev/null
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+++ configs/orangepi_zero_plus_defconfig 2018-06-23 11:43:24.637732181 -0700
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@@ -0,0 +1,17 @@
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+CONFIG_ARM=y
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+CONFIG_ARCH_SUNXI=y
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+CONFIG_SPL=y
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+CONFIG_MACH_SUN50I_H5=y
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+CONFIG_DRAM_CLK=624
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+CONFIG_DRAM_ZQ=3881977
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+CONFIG_MMC0_CD_PIN="PH13"
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+# CONFIG_MMC_SUNXI_SLOT_EXTRA=2
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+CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-orangepi-zero-plus"
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+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
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+# CONFIG_CMD_FLASH is not set
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+# CONFIG_SPL_DOS_PARTITION is not set
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+# CONFIG_SPL_EFI_PARTITION is not set
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+CONFIG_SUN8I_EMAC=y
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+CONFIG_USB_EHCI_HCD=y
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+CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
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+
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