Icarus Verilog is a Verilog simulation and synthesis tool. It operates as a
compiler, compiling source code writen in Verilog (IEEE-1364) into some target
format. For batch simulation, the compiler can generate C++ code that is
compiled and linked with a run time library (called "vvm") then executed as
a command to run the simulation. For synthesis, the compiler generates
netlists in the desired format.
The compiler proper is intended to parse and elaborate design descriptions
written to the IEEE standard IEEE Std 1364-1995. This is a fairly large and
complex standard, so it will take some time for it to get there, but that's
the goal. I'll be tracking the upcoming IEEE Std 1364-1999 revision as well,
and some -1999 features will creep in.
ACS is a general purpose circuit simulator. It performs nonlinear
dc and transient analyses, fourier analysis, and ac analysis
linearized at an operating point. It is fully interactive and
command driven. It can also be run in batch mode or as a server.
The output is produced as it simulates. Spice compatible models
for the MOSFET (level 1,2,3,6) and diode are included in this
release.
Since it is fully interactive, it is possible to make changes and
re-simulate quickly. The interactive design makes it well suited
to the typical iterative design process used it optimizing a circuit
design. It is also well suited to undergraduate teaching where
Spice in batch mode can be quite intimidating. This version, while
still officially in beta test, should be stable enough for basic
undergraduate teaching and courses in MOS design, but not for
bipolar design.
In batch mode it is mostly Spice compatible, so it is often possible
to use the same file for both ACS and Spice.
enhancements. Most notably, gEDA was split into several independent
modules, using a common library 'libgeda'. These modules are now separate
packages with geda now becoming a meta package.
note that the version number is the date when I grabbed the
sources. There is no "official" version included in the
sources.
Xchiplogo reads an ascii bitmap file, and converts it into a
magic or cif file. It is a handy program for creating logos
of text or graphics for putting on VLSI chips. At the
moment it accepts the B&W dithered format of XV as the
input. It has got quite a few options for resizing and get-
ting rid of many design rule errors that can be found in the
bitmap file. It has a smoothing, before and after an error
correction step. The error correction step is pretty simple
,don't expect miracles, but it works quite fine and spe-
cially for text gives a reasonable output.
- fixed program version number reported when spice is run to make it consistent
with the version of the program.
- several patches to fix compilation warnings due to missing header files and
some inconsistent variable types.
- broke out previous patch-aa which patched several files into 1 patch per file.
- fixed some code which returned the address of a local char array variable.
- added GNU readline support (a huge improvement in the interface)
- changed USE_X11BASE to USE_X11. No reason to install into X11BASE.
- removed 'x' target from package Makefile
Important changes are:
- Now uses gtk+-1.2.2
- A bunch of bug fixes.
- Added a coordinate window to gschem
- Integration of contributed symbols.
- Latest Jerry O'Keefe's gmk_sym integrated
- Mike Jarabek's verilog gnetlist backend integrated
- Jamil Khatib's latest gschcheck
build a binary package with this definition would fail as the PLIST is
not correct.
If a package's documentation is overwhelming, it should arguably be handled
in a separate pre-requisite documentation package.
around my /usr/pkg/bin, and thus tex never got installed, and the build
blew up. I don't believe any older pkgs install "tex", so this should be
a safe bet.
- New, optional Makefile variable HOMEPAGE, specifies a URL for
the home page of the software if it has one.
- The value of HOMEPAGE is used to add a link from the
README.html files.
- pkglint updated to know about it. The "correct" location for
HOMEPAGE in the Makefile is after MAINTAINER, in that same
section.
