Commit graph

5 commits

Author SHA1 Message Date
smb
7fdf540f23 Upgrade to 2.10:
*** Enhancements in v2.10 : ***

* New Features
      o Added support for Intel Core i7 (Nehalem) CPU
      o Added support for Intel Atom Processors
      o Added support for Intel G41/G43/G45 Chipsets
      o Added support for Intel P43/P45 Chipsets
      o Added support for Intel US15W (Poulsbo) Chipset
      o Added support for Intel EP80579 (Tolapai) SoC CPU
      o Added support for ICH10 Southbridge (SPD/DMI)
      o Added detection for Intel 5000X
      o Now fully aware of CPU w/ L3 cache (Core i7 & K10)

* Bug Fixes
      o Added workaround for DDR3 DMI detection
      o Fixed Intel 5000Z chipset detection
      o Fixed Memory Frequency on AMD K10
      o Fixed cache detection on C7/Isaiah CPU
      o Fix Memtest86+ not recognized as Linux Kernel

Enhancements in v2.01 :

    * Added support for i945GM/PM/GME & i946PL/GZ
    * Added support for iGM965/iGL960/iPM965/iGME965/iGLE960
    * Added detection for SiS 649/656/671/672
    * Added detection for i430MX/i430TX
    * Added an optional beep mode (pass completed w/o error)
    * Pass duration 20% reduced
    * Removed the blinking cursor
    * Reverted Test #0 to cached
    * Solved a major bug in Memory Address Errors Reporting
    * Patched for Intel-Powered Mac
    * Corrected Intel 3-Series (P35/X38) chipset init
    * Corrected a bug with SPD Display and ESB6300
    * Correct a detection bug on P965/G965 C-Stepping
    * Solved a incoherency with pass progress indicator
    * Patched Makefile to compile on x86_64
    * Bootable Memtest86+ ISO more compatible

Enhancements in v2.00 :

    * Major Architectures changes
    * Modulo test now use random pattern for better accuracy
    * Added Advanced DMI Errors Reporting Mode
    * Added support for bus ratio changes on Intel Core CPU
    * Added support for non-integer bus ratio on latest Intel CPU
    * Added SPD Data Display for all Intel Chipsets (more to come)
    * Added serial support as a linux boot parameter (Thanks to Michal S.)
    * Added preliminary support for VIA CN Isaiah CPU
    * Added preliminary support for Intel Nehalem
    * Added support for VIA C7/C7-D/C7-M/Eden on Esther Core
    * Added support for AMD K10 (Phenom) CPU w/ timings detection
    * Added support for Intel Pentium E w/ 1 MB L2 Cache
    * Added support for Intel Core 2 45nm (Penryn)
    * Added support for FSB1333/FSB1600 Intel CPU
    * Added support for Intel 5400A/5400B w/ timings detection
    * Added support for Intel Q35/P35/G33/Q33 w/ timings detection
    * Added support for Intel X38/X48 w/ timings detection
    * Added preliminary support for Intel 5000P/V/Z
    * Removed on-fly memory timings change (unstable)
    * Numerous (really) bug fixes
2008-11-24 04:06:00 +00:00
jlam
841dfa0e7a Convert to use PLIST_VARS instead of manually passing "@comment "
through PLIST_SUBST to the plist module.
2008-04-12 22:42:57 +00:00
mlelstv
b3f0ca1da6 Update to Version 1.70. Also rename the package option
from memtesplus-* (sic!) to just iso and serialconsole.

changes for the new version:

- Added new DMI polling feature
- Added Support for Core/Core2 Solo/Duo/Quad CPU
- Added Support for AMD K8 with DDR2 Memory
- Added Support for Intel CPU with 192/384 KB L2 Cache
- Added Support for FB-DIMM based memory (DMI)
- Added Detection for ALI CyberAladdin-T (M1644)
- Added Detection for Turion 64 X2
- Added Detection for AMD K8 with unknown chipsets
- Added Support for ATi Radeon xPress 3200
- Added Support for Intel i975X
- Added Support for Intel Q965/P965
- Added Support for Intel Q963/Q965
2007-12-30 18:40:52 +00:00
smb
038a629f32 Several fixes:
a) 'make install' was broken if option memtestplus-iso was
	   specified
	b) patch-ac wouldn't pass pkglint
	c) correct document for the BadRAM link
	d) add compilation support for 64-bit i386 ports
2007-01-06 22:26:55 +00:00
smb
0dd1f0146e Add memtest+ 1.65 to pkgsrc, with options for serial console and .iso generation 2006-10-24 18:00:05 +00:00