Tested on NetBSD-current and 9.1/amd64.
Also update packages tightly coupled to llvm, if new versions are
available.
Mark creduce, include-what-you-use, and zig broken (waiting for a
new release).
Changes:
Non-comprehensive list of changes in this release
Windows Control-flow Enforcement Technology: the -ehcontguard
option now emits valid unwind entrypoints which are validated
when the context is being set during exception handling.
Flang is now included in the binary packages released by LLVM.
The debuginfo-test project has been renamed cross-project-tests
and is now intended for testing components from multiple
projects, not just debug information. The new “cross-project-tests”
name replaces “debuginfo-test” in LLVM_ENABLE_PROJECTS, and a
new check-cross-project-tests target has been added for running
all tests in the project. The pre-existing check-debuginfo-
test target remains for running just the debug information
tests. (D95339 and D96513)
Changes to the LLVM IR
The inalloca attribute now has a mandatory type field, similar
to byval and sret.
The opaque pointer type ptr has been introduced. It is still
in the process of being worked on and should not be used yet.
Using the legacy pass manager for the optimization pipeline is
deprecated and will be removed after LLVM 14. In the meantime,
only minimal effort will be made to maintain the legacy pass
manager for the optimization pipeline.
Changes to building LLVM
The build system now supports building multiple distributions,
so that you can e.g. have one distribution containing just
tools and another for libraries (to enable development). See
Multi-distribution configurations for details.
Changes to the AArch64 Backend
Introduced assembly support for Armv9-A’s Realm Management
Extension (RME) and Scalable Matrix Extension (SME).
Produce proper cross-section relative relocations on COFF
Fixed the calling convention on Windows for variadic functions
involving floats in the fixed arguments
Changes to the ARM Backend
Produce proper cross-section relative relocations on COFF
Changes to the Hexagon Target
The Hexagon target now supports V68/HVX ISA.
Changes to the C API
The C API functions LLVMGetAlignment and LLVMSetAlignment now
allow changing alignment on atomicrmw and cmpxchg instructions
A new entry LLVMDIArgListMetadataKind was added to the
LLVMMetadataKind enum, representing DIArgLists (D88175)
Type attributes have been added to LLVM-C, introducing
LLVMCreateTypeAttribute, LLVMGetTypeAttributeValue and
LLVMIsTypeAttribute. (D977763’)
The LTO_API_VERSION was bumped to 28, introducing a new function
lto_set_debug_options for parsing LTO debug options (D92611)
LLVMJITTargetSymbolFlags was renamed to LLVMJITSymbolTargetFlags
(rG8d718a0bff73af066675a6258c01307937c33cf9)
The C API received support for creating custom ORCv2
MaterializationUnits and APIs to retrieve an LLJIT instance’s
linking layers. An ABI breaking change for LLVMOrcAbsoluteSymbols
was introduced to make it consistent with
LLVMOrcCreateCustomMaterializationUnit.
(rGc8fc5e3ba942057d6c4cdcd1faeae69a28e7b671)
The C API received support for adding ORCv2 object buffers
directly to an object layer.
(rG7b73cd684a8d5fb44d34064200f10e2723085c33)
A breaking change to LLVMGetInlineAsm was introduced, adding
a ninth argument LLVMBool CanThrow (D95745)
The C API received support for calling into the new pass manager.
(D102136)
The C API function LLVMIntrinsicCopyOverloadedName has been
deprecated. Please migrate to LLVMIntrinsicCopyOverloadedName2
which takes an extra module argument and which also handles
unnamed types. (D99173)
The C API received support for dumping objects from ORCv2
(rGcec8e69f01c3374cb38c6683058381b96fab8f89)
A breaking change to LLVMOrcObjectTransformLayerTransformFunction
was introduced, changing the order of the function pointer’s
arguments. (rG8962c68ad007a525f9daa987c99eda57e0d0069a)
The C API received support for accessing utilities from the
LLJIT IRTransformLayer and ThreadSafeModule classes. (D103855)
The C API received support for creating lazy-export
MaterializationUnits (D104672)
The C API function LLVMPassBuilderOptionsSetCoroutines was
removed because couroutine passes have been enabled by default.
(D105877)
comdat noduplicates was renamed to comdat nodeduplicate and as
a result, LLVMNoDuplicatesComdatSelectionKind was renamed to
LLVMNoDeduplicateComdatSelectionKind. (D106319)
Changes to the FastISel infrastructure
FastISel no longer tracks killed registers, and instead leaves
this to the register allocator. This means that hasTrivialKill()
is removed, as well as the OpNIsKill parameters to the fastEmit_*()
family of functions.
Changes to the LLVM tools
The options --build-id-link-{dir,input,output} have been deleted.
(D96310)
Support for in-order processors has been added to llvm-mca.
(D94928)
llvm-objdump supports -M {att,intel} now. --x86-asm-syntax is
a deprecated internal option which will be removed in LLVM
14.0.0. (D101695)
The llvm-readobj short aliases -s (previously --sections) and
-t (previously --syms) have been changed to --syms and
--section-details respectively, to match llvm-readelf. (D105055)
The llvm-nm short aliases -M (--print-armap), -U (--defined-only),
and -W (--no-weak) are now deprecated. Use the long form versions
instead. The alias --just-symbol-name is now deprecated in
favor of --format=just-symbols and -j. (D105330)
In lli the default JIT engine switched from MCJIT (-jit-kind=mcjit)
to ORC (-jit-kind=orc). (D98931)
llvm-rc got support for invoking Clang to preprocess its input.
(D100755)
llvm-rc got a GNU windres compatible frontend, llvm-windres.
(D100756)
llvm-ml has improved compatibility with MS ml.exe, managing to
assemble more asm files.
Changes to LLDB
LLDB executable is now included in pre-built LLVM binaries.
LLDB now includes full featured support for AArch64 SVE register
access.
LLDB now supports AArch64 Pointer Authentication, allowing
stack unwind with signed return address.
LLDB now supports debugging programs on AArch64 Linux that use
memory tagging (MTE).
Added memory tag read and memory tag write commands.
The memory region command will note when a region has memory
tagging enabled.
Synchronous and asynchronous tag faults are recognised.
Synchronous tag faults have memory tag annotations in addition
to the usual fault address.
12.0.1:
Non-comprehensive list of changes in this release
The ConstantPropagation pass was removed. Users should use the InstSimplify pass instead.
Changes to the LLVM IR
Added the byref attribute to better represent argument passing for the amdgpu_kernel calling convention.
Added type parameter to the sret attribute to continue work on removing pointer element types.
The llvm.experimental.vector.reduce family of intrinsics have been renamed to drop the “experimental” from the name, reflecting their now fully supported status in the IR.
Changes to building LLVM
The internal llvm-build Python script and the associated LLVMBuild.txt files used to describe the LLVM component structure have been removed and replaced by a pure CMake approach, where each component stores extra properties in the created targets. These properties are processed once all components are defined to resolve library dependencies and produce the header expected by llvm-config.
Changes to TableGen
The new “TableGen Programmer’s Reference” replaces the “TableGen Language Introduction” and “TableGen Language Reference” documents.
The syntax for specifying an integer range in a range list has changed. The old syntax used a hyphen in the range (e.g., {0-9}). The new syntax uses the “…” range punctuation (e.g., {0...9}). The hyphen syntax is deprecated.
Changes to the AArch64 Backend
Lots of improvements to generation of Windows unwind data; the unwind data is optimized and written in packed form where possible, reducing the size of unwind data (pdata and xdata sections) by around 60% compared with LLVM 11. The generation of prologs/epilogs is tweaked when targeting Windows, to increase the chances of being able to use the packed unwind info format.
Support for creating Windows unwind data using .seh_* assembler directives.
Produce proper assembly output for the Windows target, including :lo12: relocation specifiers, to allow the assembly output to actually be assembled.
Changed the assembly comment string for MSVC targets to // (consistent with the MinGW and ELF targets), freeing up ; to be used as statement separator.
Changes to the ARM Backend
Changes to the MIPS Target
Changes to the PowerPC Target
Optimization:
Made improvements to loop unroll-and-jam including fix to respect user provided #pragma unroll-and-jam for loops on targets other than ARM.
Improved PartialInliner allowing it to handle code regions in a switch statements.
Improved PGO support on AIX by building and linking with compiler-rt profile library.
Add support for Epilogue Vectorization and enabled it by default.
CodeGen:
POWER10 support * Implementation of PC Relative addressing in LLD including the associated
linker optimizations.
Add support for the new matrix multiplication (MMA) instructions to Clang and LLVM.
Implementation of Power10 builtins.
Scheduling enhancements * Add a new algorithm to cluster more loads/stores if the DAG is not too
complicated.
Enable the PowerPC scheduling heuristic for Power10.
Target dependent passes tuning * Enhance LoopStrengthReduce/PPCLoopInstrFormPrep pass for PowerPC,
especially for P10 intrinsics.
Enhance machine combiner pass to reduce register pressure for PowerPC.
Improve MachineSink to do more sinking based on register pressure and alias analysis.
General improvements * Complete the constrained floating point operations support. * Improve the llvm-exegesis support. * Improve the stack clash protection to probe the gap between stackptr and
realigned stackptr.
Improve the IEEE long double support for Power8.
Enable MemorySSA for LoopSink.
Enhance LLVM debugging functionality via options such as -print-changed and -print-before-changed.
Add builtins for Power9 (i.e. darn, xvtdiv, xvtsqrt etc).
Add options to disable all or part of LoopIdiomRecognizePass.
Add support for printing the DDG in DOT form allowing for visual inspection of the Data Dependence Graph.
Remove the QPX support.
Significant number of bug fixes including all the fixes necessary to achieve a clean test run for Julia.
AIX Support:
Compiler-rt support * Add support for building compiler-rt for AIX and 32-bit Power targets. * Made compiler-rt the default rtlib for AIX.
General Improvements * Enable the AIX extended AltiVec ABI under option -mabi=vec-extabi. * Add partial C99 complex type support. * Implemente traceback table for functions (encodes vector information, emits exception handling).
Implemente code generation for C++ dynamic initialization and finalization. of non-local variables for use with the -bcdtors option of the AIX linker.
Add new option -mignore-xcoff-visibility.
Enable explicit sections on AIX.
Enable -f[no-]data-sections on AIX and set -fdata-sections to be the default on AIX.
Enable -f[no-]function-sections.
Add support for relocation generation using the large code model.
Add pragma align natural and sorted out pragma pack stack effect.
Changes to the X86 Target
The ‘mpx’ feature was removed from the backend. It had been removed from clang frontend in 10.0. Mention of the ‘mpx’ feature in an IR file will print a message to stderr, but IR should still compile.
Support for -march=alderlake, -march=sapphirerapids, -march=znver3 and -march=x86-64-v[234] has been added.
The assembler now has support for {disp32} and {disp8} pseudo prefixes for controlling displacement size for memory operands and jump displacements. The assembler also supports the .d32 and .d8 mnemonic suffixes to do the same.
A new function attribute “tune-cpu” has been added to support -mtune like gcc. This allows microarchitectural optimizations to be applied independent from the “target-cpu” attribute or TargetMachine CPU which will be used to select Instruction Set. If the attribute is not present, the tune CPU will follow the target CPU.
Support for HRESET instructions has been added.
Support for UINTR instructions has been added.
Support for AVXVNNI instructions has been added.
Changes to the AMDGPU Target
The new byref attribute is now the preferred method for representing aggregate kernel arguments.
9.0.0:
Non-comprehensive list of changes in this release:
* Two new extension points, namely EP_FullLinkTimeOptimizationEarly and EP_FullLinkTimeOptimizationLast are available for plugins to specialize the legacy pass manager full LTO pipeline.
* llvm-objcopy/llvm-strip got support for COFF object files/executables, supporting the most common copying/stripping options.
* The CMake parameter CLANG_ANALYZER_ENABLE_Z3_SOLVER has been replaced by LLVM_ENABLE_Z3_SOLVER.
* The RISCV target is no longer “experimental” (see Changes to the RISCV Target below for more details).
* The ORCv1 JIT API has been deprecated. Please see Transitioning from ORCv1 to ORCv2.
* Support for target-independent hardware loops in IR has been added, with PowerPC and Arm implementations.
8.0.0:
Non-comprehensive list of changes in this release
* The llvm-cov tool can now export lcov trace files using the -format=lcov option of the export command.
* The add_llvm_loadable_module CMake macro has been removed. The add_llvm_library macro with the MODULE argument now provides the same functionality. See Writing an LLVM Pass.
* For MinGW, references to data variables that might need to be imported from a dll are accessed via a stub, to allow the linker to convert it to a dllimport if needed.
* Added support for labels as offsets in .reloc directive.
* Support for precise identification of X86 instructions with memory operands, by using debug information. This supports profile-driven cache prefetching. It is enabled with the -x86-discriminate-memops LLVM Flag.
* Support for profile-driven software cache prefetching on X86. This is part of a larger system, consisting of: an offline cache prefetches recommender, AutoFDO tooling, and LLVM. In this system, a binary compiled with -x86-discriminate-memops is run under the observation of the recommender. The recommender identifies certain memory access instructions by their binary file address, and recommends a prefetch of a specific type (NTA, T0, etc) be performed at a specified fixed offset from such an instruction’s memory operand. Next, this information needs to be converted to the AutoFDO syntax and the resulting profile may be passed back to the compiler with the LLVM flag -prefetch-hints-file, together with the exact same set of compilation parameters used for the original binary. More information is available in the RFC.
* Windows support for libFuzzer (x86_64).
LLVM 7.0.0 Release
The release contains the work on trunk up to SVN revision 338536 plus
work on the release branch. It is the result of the community's work
over the past six months, including: function multiversioning in Clang
with the 'target' attribute for ELF-based x86/x86_64 targets, improved
PCH support in clang-cl, preliminary DWARF v5 support, basic support
for OpenMP 4.5 offloading to NVPTX, OpenCL C++ support, MSan, X-Ray
and libFuzzer support for FreeBSD, early UBSan, X-Ray and libFuzzer
support for OpenBSD, UBSan checks for implicit conversions, many
long-tail compatibility issues fixed in lld which is now production
ready for ELF, COFF and MinGW, new tools llvm-exegesis, llvm-mca and
diagtool. And as usual, many optimizations, improved diagnostics, and
bug fixes.
For more details, see the release notes:
https://llvm.org/releases/7.0.0/docs/ReleaseNotes.htmlhttps://llvm.org/releases/7.0.0/tools/clang/docs/ReleaseNotes.htmlhttps://llvm.org/releases/7.0.0/tools/clang/tools/extra/docs/ReleaseNotes.htmlhttps://llvm.org/releases/7.0.0/tools/lld/docs/ReleaseNotes.html
The actual fix as been done by "pkglint -F */*/buildlink3.mk", and was
reviewed manually.
There are some .include lines that still are indented with zero spaces
although the surrounding .if is indented. This is existing practice.
* Drop CppBackend. It is removed.
Changelog:
* GCC ABI Tag
* LLVM IR: new intrinsics etc.
* Change LLVM IPO model
* Support ThinLTO
* Improve the ARM targets, ARMv8.2-A support etc.
* Improve the MIPS targets
* Improve the PowerPC target, default optim O3 to O2
* Improve the X86 target, SKylake AVX-512 etc.
* Improve the AMDGPU, better support for Mesa 12
Packaged in pkgsrc-wip by myself and Kamil.
Remove stale pkgsrc/SunOS bread crumbs that were difficult to merge
following the build framework switch. Needs to be redone. (Sorry!)
Summary of significant changes in LLVM:
- switch build framework from autoconf to CMake
- llvm-ar now supports thin archives.
- llvm doesn t produce .data.rel.ro.local or .data.rel sections anymore.
- opional support for linking clang and the LLVM tools with a single
libLLVM shared library
pkgsrc note: we have this library in lang/libLLVM, but we don't currently
use it. We may do so in the future if/when the API matures.
- The optimization to move the prologue and epilogue of functions in colder
code path (shrink-wrapping) is now enabled by default
- new target-independent gcc-compatible emulated Thread Local Storage mode
- various target specific optimizations
Summary of significant changes in Clang:
- new compiler flags for tuning what DWARF information is included
- better strict alignment handling
- better support for __builtin_object_size
