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Author SHA1 Message Date
dmcmahill
bcc1530ee8 Update to acs-0.26. Changes (from ${WRKSRC}/doc/relnotes-026) are:
New features:

1. BSIM1, BSIM2 models -- DC only.
2. New elements:
        trans-capacitor
        voltage controlled capacitor
        voltage controlled conductance
        voltage controlled resistor
3. Optional new syntax, with type first so component labels can start
with any letter, and the choice of components is no longer limited by
the 26 letters.  This was necessary for a clean syntax
for #2.
4. Some new parameters on existing devices, also a side
effect of the BSIM work.
5. The manual in HTML form.  The manual source is still in LaTeX,
which can be used to generate HTML, PDF, Postscript, or many other
formats.

Bug fixes:

1. An error causing truncation error to be underestimated has been fixed.

Other improvements:

1. MOSFET model evaluation is a little faster, due to use of one of
the new elements to replace several old ones.  I have seen 40%, but
20% is more likely.  The improvement is most evident on busy circuits,
where the ACS speed enhancements based on latency exploitation
contribute more overhead than their value, that is .. the type of
circuit that has run faster in Spice than ACS.

2. More documentation on internals.

Changes that I think are improvements, but some may disagree:

1. Truncation error based step control is disabled when Euler's method
is selected.  The justification for this is that the reason for
selecting Euler's method is to avoid the artifacts of high order
methods on "stiff" poles.  Without this change, a "stiff" pole would
cause an unreasonably small step size.  This did not appear to be much
of a problem in the old release because the use of an incorrect
formula for estimating truncation error.  A "stiff" pole is one that
has a response so fast it can be thought of as instantaneous.

2. The "help" command, with its 4 year old help file, has been
removed.  The concept is really obsolete.  With the HTML form of the
manual, a full online manual is a better replacement.
2000-03-26 15:50:21 +00:00
wiz
3333ba9b64 remove unnecessary article 2000-02-05 18:18:35 +00:00
dmcmahill
1147c1c9c0 Initial import of acs-0.25
ACS is a general purpose circuit simulator.  It performs nonlinear
dc and transient analyses, fourier analysis, and ac analysis
linearized at an operating point.  It is fully interactive and
command driven.  It can also be run in batch mode or as a server.
The output is produced as it simulates.  Spice compatible models
for the MOSFET (level 1,2,3,6) and diode are included in this
release.

Since it is fully interactive, it is possible to make changes and
re-simulate quickly.  The interactive design makes it well suited
to the typical iterative design process used it optimizing a circuit
design.  It is also well suited to undergraduate teaching where
Spice in batch mode can be quite intimidating.  This version, while
still officially in beta test, should be stable enough for basic
undergraduate teaching and courses in MOS design, but not for
bipolar design.

In batch mode it is mostly Spice compatible, so it is often possible
to use the same file for both ACS and Spice.
2000-01-24 22:13:22 +00:00