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3 commits

Author SHA1 Message Date
ryoon
a9ad37fb28 gcc10, gcc10-libs: Update to 10.3.0
Changelog:
* Bugfixes.

Target Specific Changes
AArch64

    A bug with the Random Number intrinsics in the arm_acle.h header
    that resulted in an incorrect status result being returned has
    been fixed.

    GCC now supports the Fujitsu A64FX. The associated -mcpu and
    -mtune options are -mcpu=a64fx and -mtune=a64fx respectively.
    In particular, -mcpu=a64fx generates code for Armv8.2-A with
    SVE and tunes the code for the A64FX. This includes tuning the
    SVE code, although by default the code is still length-agnostic
    and so works for all SVE implementations. Adding -msve-vector-bits=512
    makes the code specific to 512-bit SVE.
2021-04-16 15:03:42 +00:00
wiz
24e2188e09 gcc10: update to 10.2.0.
Bugfix release. The fixed bugs are listed here:
https://gcc.gnu.org/bugzilla/buglist.cgi?bug_status=RESOLVED&resolution=FIXED&target_milestone=10.2
2020-08-24 11:58:38 +00:00
maya
e87261ad01 add gcc10 GCC version 10.1.0
Release notes: https://gcc.gnu.org/gcc-10/changes.html
2020-05-10 15:02:44 +00:00