This release contains lots of bug fixes and also contains the
initial version of the Covered report viewing GUI (line coverage only). The following is a
description of the changes made since the last development release.
- Ran C linting tool on all Covered source code and updated code based on linting errors/
warnings.
- Modified debug output to show file and line number of code that called the outputting
function (easier to debug problems and useful in error regression testing).
- Started initial error testing in regressions.
- Several bug fixes made to remove segmentation faults and assertion errors in the new
report generation functions.
- Initial version of Covered report viewing GUI added. This version displays line coverage
only at the moment.
- Fixed bug in score command for statement removal (was resulting in memory errors that led
to segmentation faults).
- Fixed bug in report command that output bad verbose information when -c option was used.
- Added new diagnostics to regression testsuite to reproduce situations where original
segmentation faults were found to occur.
- Development documentation updates. No user documentation updates are released at this
time (other than information provided using the -h global option to Covered).
This is a development snapshot. Packages of the released/stable
versions will be imported as 'cad/covered' when available.
Covered is a Verilog code coverage analysis tool that can be useful
for determining how well a diagnostic test suite is covering the
design under test. Typically in the design verification work flow, a
design verification engineer will develop a self-checking test suite
to verify design elements/functions specified by a design's
specification document. When the test suite contains all of the tests
required by the design specification, the test writer may be asking
him/herself, "How much logic in the design is actually being
exercised?", "Does my test suite cover all of the logic under test?",
and "Am I done writing tests for the logic?". When the design
verification gets to this point, it is often useful to get some
metrics for determining logic coverage. This is where a code coverage
utility, such as Covered, is very useful.
Please note that this package is a development snapshot and while it
contains the latest and greatest features, it may be buggy as well.
There is a seperate package which is made of the stable releases.
