a18f1fefa1
(Patches have been sent upstream.) PKGREVISION++.
237 lines
6.4 KiB
Text
237 lines
6.4 KiB
Text
$NetBSD: patch-af,v 1.1 2008/08/02 16:46:56 dholland Exp $
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diff -urpN /dev/null x86_pio.h
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--- /dev/null 1969-12-31 19:00:00.000000000 -0500
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+++ x86_pio.h 2008-08-02 12:15:47.000000000 -0400
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@@ -0,0 +1,231 @@
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+/* $NetBSD: patch-af,v 1.1 2008/08/02 16:46:56 dholland Exp $ */
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+
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+/*-
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+ * Copyright (c) 1998 The NetBSD Foundation, Inc.
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+ * All rights reserved.
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+ *
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+ * This code is derived from software contributed to The NetBSD Foundation
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+ * by Charles M. Hannum.
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+ *
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+ * Redistribution and use in source and binary forms, with or without
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+ * modification, are permitted provided that the following conditions
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+ * are met:
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+ * 1. Redistributions of source code must retain the above copyright
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+ * notice, this list of conditions and the following disclaimer.
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+ * 2. Redistributions in binary form must reproduce the above copyright
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+ * notice, this list of conditions and the following disclaimer in the
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+ * documentation and/or other materials provided with the distribution.
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+ * 3. All advertising materials mentioning features or use of this software
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+ * must display the following acknowledgement:
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+ * This product includes software developed by the NetBSD
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+ * Foundation, Inc. and its contributors.
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+ * 4. Neither the name of The NetBSD Foundation nor the names of its
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+ * contributors may be used to endorse or promote products derived
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+ * from this software without specific prior written permission.
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+ *
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+ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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+ * POSSIBILITY OF SUCH DAMAGE.
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+ */
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+
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+#ifndef _X86_PIO_H_
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+#define _X86_PIO_H_
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+
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+/*
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+ * Functions to provide access to x86 programmed I/O instructions.
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+ *
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+ * The in[bwl]() and out[bwl]() functions are split into two varieties: one to
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+ * use a small, constant, 8-bit port number, and another to use a large or
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+ * variable port number. The former can be compiled as a smaller instruction.
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+ */
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+
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+
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+#ifdef __OPTIMIZE__
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+
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+#define __use_immediate_port(port) \
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+ (__builtin_constant_p((port)) && (port) < 0x100)
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+
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+#else
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+
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+#define __use_immediate_port(port) 0
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+
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+#endif
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+
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+
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+#define inb(port) \
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+ (/* CONSTCOND */ __use_immediate_port(port) ? __inbc(port) : __inb(port))
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+
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+static __inline u_int8_t
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+__inbc(unsigned port)
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+{
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+ u_int8_t data;
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+ __asm volatile("inb %w1,%0" : "=a" (data) : "id" (port));
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+ return data;
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+}
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+
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+static __inline u_int8_t
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+__inb(unsigned port)
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+{
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+ u_int8_t data;
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+ __asm volatile("inb %w1,%0" : "=a" (data) : "d" (port));
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+ return data;
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+}
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+
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+static __inline void
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+insb(unsigned port, void *addr, int cnt)
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+{
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+ void *dummy1;
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+ int dummy2;
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+ __asm volatile("cld\n\trep\n\tinsb" :
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+ "=D" (dummy1), "=c" (dummy2) :
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+ "d" (port), "0" (addr), "1" (cnt) :
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+ "memory");
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+}
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+
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+#define inw(port) \
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+ (/* CONSTCOND */ __use_immediate_port(port) ? __inwc(port) : __inw(port))
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+
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+static __inline u_int16_t
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+__inwc(unsigned port)
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+{
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+ u_int16_t data;
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+ __asm volatile("inw %w1,%0" : "=a" (data) : "id" (port));
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+ return data;
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+}
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+
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+static __inline u_int16_t
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+__inw(unsigned port)
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+{
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+ u_int16_t data;
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+ __asm volatile("inw %w1,%0" : "=a" (data) : "d" (port));
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+ return data;
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+}
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+
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+static __inline void
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+insw(unsigned port, void *addr, int cnt)
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+{
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+ void *dummy1;
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+ int dummy2;
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+ __asm volatile("cld\n\trep\n\tinsw" :
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+ "=D" (dummy1), "=c" (dummy2) :
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+ "d" (port), "0" (addr), "1" (cnt) :
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+ "memory");
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+}
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+
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+#define inl(port) \
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+ (/* CONSTCOND */ __use_immediate_port(port) ? __inlc(port) : __inl(port))
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+
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+static __inline u_int32_t
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+__inlc(unsigned port)
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+{
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+ u_int32_t data;
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+ __asm volatile("inl %w1,%0" : "=a" (data) : "id" (port));
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+ return data;
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+}
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+
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+static __inline u_int32_t
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+__inl(unsigned port)
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+{
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+ u_int32_t data;
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+ __asm volatile("inl %w1,%0" : "=a" (data) : "d" (port));
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+ return data;
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+}
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+
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+static __inline void
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+insl(unsigned port, void *addr, int cnt)
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+{
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+ void *dummy1;
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+ int dummy2;
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+ __asm volatile("cld\n\trep\n\tinsl" :
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+ "=D" (dummy1), "=c" (dummy2) :
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+ "d" (port), "0" (addr), "1" (cnt) :
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+ "memory");
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+}
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+
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+#define outb(port, data) \
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+ (/* CONSTCOND */__use_immediate_port(port) ? __outbc(port, data) : \
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+ __outb(port, data))
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+
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+static __inline void
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+__outbc(unsigned port, u_int8_t data)
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+{
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+ __asm volatile("outb %0,%w1" : : "a" (data), "id" (port));
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+}
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+
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+static __inline void
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+__outb(unsigned port, u_int8_t data)
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+{
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+ __asm volatile("outb %0,%w1" : : "a" (data), "d" (port));
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+}
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+
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+static __inline void
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+outsb(unsigned port, const void *addr, int cnt)
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+{
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+ void *dummy1;
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+ int dummy2;
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+ __asm volatile("cld\n\trep\n\toutsb" :
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+ "=S" (dummy1), "=c" (dummy2) :
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+ "d" (port), "0" (addr), "1" (cnt));
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+}
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+
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+#define outw(port, data) \
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+ (/* CONSTCOND */ __use_immediate_port(port) ? __outwc(port, data) : \
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+ __outw(port, data))
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+
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+static __inline void
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+__outwc(unsigned port, u_int16_t data)
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+{
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+ __asm volatile("outw %0,%w1" : : "a" (data), "id" (port));
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+}
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+
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+static __inline void
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+__outw(unsigned port, u_int16_t data)
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+{
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+ __asm volatile("outw %0,%w1" : : "a" (data), "d" (port));
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+}
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+
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+static __inline void
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+outsw(unsigned port, const void *addr, int cnt)
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+{
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+ void *dummy1;
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+ int dummy2;
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+ __asm volatile("cld\n\trep\n\toutsw" :
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+ "=S" (dummy1), "=c" (dummy2) :
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+ "d" (port), "0" (addr), "1" (cnt));
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+}
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+
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+#define outl(port, data) \
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+ (/* CONSTCOND */ __use_immediate_port(port) ? __outlc(port, data) : \
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+ __outl(port, data))
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+
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+static __inline void
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+__outlc(unsigned port, u_int32_t data)
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+{
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+ __asm volatile("outl %0,%w1" : : "a" (data), "id" (port));
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+}
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+
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+static __inline void
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+__outl(unsigned port, u_int32_t data)
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+{
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+ __asm volatile("outl %0,%w1" : : "a" (data), "d" (port));
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+}
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+
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+static __inline void
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+outsl(unsigned port, const void *addr, int cnt)
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+{
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+ void *dummy1;
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+ int dummy2;
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+ __asm volatile("cld\n\trep\n\toutsl" :
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+ "=S" (dummy1), "=c" (dummy2) :
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+ "d" (port), "0" (addr), "1" (cnt));
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+}
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+
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+#endif /* _X86_PIO_H_ */
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