198b016345
It's a rename of cad/verilog to a better name. Updated DESCR for new package: Icarus Verilog is intended to compile ALL of the Verilog HDL as described in the IEEE-1364 standard. Of course, it's not quite there yet. It does currently handle a mix of structural and behavioral constructs. Icarus Verilog is not aimed at being a simulator in the traditional sense, but a compiler that generates code employed by back-end tools. No objections to rename from <gdt>
9 lines
600 B
Text
9 lines
600 B
Text
$NetBSD: distinfo,v 1.1 2016/10/08 23:01:45 kamil Exp $
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SHA1 (verilog-10.1.1.tar.gz) = 7f4cead8cabb90cc4525951357c43866ca710749
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RMD160 (verilog-10.1.1.tar.gz) = 77c933b712ab027b13a81e3eead7ee4f565741b7
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SHA512 (verilog-10.1.1.tar.gz) = a57fdce3d870be8ce39eb3050dabd5a2d4d491c657b85ccbf775bef7fa9a6889a18bf4d2508341ef2cc17d872b5d6c802d4fd8585e4ec7952526699ebb24bfac
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Size (verilog-10.1.1.tar.gz) = 1684925 bytes
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SHA1 (patch-aa) = cf075110416f6db0892129796cd83b8ae8de55fa
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SHA1 (patch-ad) = bf7d227ed3b321021d8aff54cd008f4b2a1557b9
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SHA1 (patch-cadpli_Makefile) = ed21a5f529ac449c26b831cbd5fde052d9ed5466
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