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changes are: ----------- RELEASE NOTE FOR ICARUS VERILOG 20010630 I've done some cleanup of the mingw port of Icarus Verilog. I've also added instructions for how to build Icarus Verilog under mingw. I'm working on making that the preferred way to support Windows, and when I make the 0.5 release I will make Windows binaries this way. Anyhow, feedback on the build instructions and the build results using the instructions in mingw.txt are welcome. I've make "vvp" the default target type. The older vvm behavior is available with the "-tvvm" flag to iverilog, but I would rather be told about (and fix) bugs in the vvp code generator and run time. I've added support for the (unsigned) right shift operator. The left shift has been working for a while now, but right shift somehow slipped through the cracks. The shift operators still don't quite work in structural contexts, but they should show up sometime next week. I've finally got VCD output working properly with vvp. It may even be better then with vvm, although some internal symbols are still generated. A few odd bugs have been fixed, including a code generation error for xnf, and error checking of user defined function parameters. |
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