198b016345
It's a rename of cad/verilog to a better name. Updated DESCR for new package: Icarus Verilog is intended to compile ALL of the Verilog HDL as described in the IEEE-1364 standard. Of course, it's not quite there yet. It does currently handle a mix of structural and behavioral constructs. Icarus Verilog is not aimed at being a simulator in the traditional sense, but a compiler that generates code employed by back-end tools. No objections to rename from <gdt>
37 lines
1 KiB
Makefile
37 lines
1 KiB
Makefile
# $NetBSD: Makefile,v 1.1 2016/10/08 23:01:45 kamil Exp $
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#
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DISTNAME= verilog-10.1.1
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# There is confision in naming of this software, use iverilog as it's saner
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PKGNAME= i${DISTNAME}
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CATEGORIES= cad
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MASTER_SITES= ftp://icarus.com/pub/eda/verilog/v10/
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# FTP has newer release than GitHub tag
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#MASTER_SITES= ${MASTER_SITE_GITHUB:=steveicarus/}
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#GITHUB_TAG= v${PKGVERSION_NOREV:S/./_/}
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MAINTAINER= dmcmahill@NetBSD.org
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HOMEPAGE= http://iverilog.icarus.com/
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COMMENT= Verilog simulation and synthesis tool (stable release version)
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LICENSE= gnu-gpl-v2
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USE_LANGUAGES= c c++
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GNU_CONFIGURE= yes
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USE_TOOLS+= gmake bison lex
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TEST_TARGET= check
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INSTALLATION_DIRS+= share/doc/ivl
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# Additional files
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post-install:
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cd ${WRKSRC}; ${INSTALL_DATA} \
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QUICK_START.txt \
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README.txt \
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${DESTDIR}${PREFIX}/share/doc/ivl
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.include "../../devel/gperf/buildlink3.mk"
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.include "../../devel/zlib/buildlink3.mk"
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.include "../../archivers/bzip2/buildlink3.mk"
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.include "../../mk/readline.buildlink3.mk"
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.include "../../mk/bsd.pkg.mk"
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