343b888793
- add sh kernel-address-in-user-mode exception support (seems to work for me, but XXX: some sh person should really look at this.)
40 lines
1.4 KiB
Text
40 lines
1.4 KiB
Text
$NetBSD: patch-ad,v 1.1 2011/07/17 12:49:17 mrg Exp $
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patch to fix big-endian mips support from matt@netbsd.org
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diff -rup src/cpus/cpu_mips_coproc.cc src/cpus/cpu_mips_coproc.cc
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--- src/cpus/cpu_mips_coproc.cc 2009-06-21 09:03:48.000000000 -0700
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+++ src/cpus/cpu_mips_coproc.cc 2009-11-12 12:22:12.000000000 -0800
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@@ -1987,6 +1987,13 @@ void coproc_function(struct cpu *cpu, st
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if (cpnr < 2 && (((function & 0x03e007f8) == (COPz_MTCz << 21))
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|| ((function & 0x03e007f8) == (COPz_DMTCz << 21)))) {
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+ tmpvalue = cpu->cd.mips.gpr[rt];
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+ if (copz == COPz_MTCz) {
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+ /* Sign-extend: */
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+ tmpvalue &= 0xffffffffULL;
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+ if (tmpvalue & 0x80000000ULL)
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+ tmpvalue |= 0xffffffff00000000ULL;
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+ }
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if (unassemble_only) {
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debug("%s%i\t%s,", copz==COPz_DMTCz? "dmtc" : "mtc",
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cpnr, regnames[rt]);
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@@ -1996,16 +2003,10 @@ void coproc_function(struct cpu *cpu, st
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debug("r%i", rd);
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if (function & 7)
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debug(",%i", (int)(function & 7));
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+ debug(" [%016llx]", (long long)tmpvalue);
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debug("\n");
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return;
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}
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- tmpvalue = cpu->cd.mips.gpr[rt];
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- if (copz == COPz_MTCz) {
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- /* Sign-extend: */
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- tmpvalue &= 0xffffffffULL;
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- if (tmpvalue & 0x80000000ULL)
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- tmpvalue |= 0xffffffff00000000ULL;
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- }
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coproc_register_write(cpu, cpu->cd.mips.coproc[cpnr], rd,
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&tmpvalue, copz == COPz_DMTCz, function & 7);
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return;
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